• 1257 Citations
  • 18 h-Index
20002020

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2019

An Energy-efficient On-chip Learning Architecture for STDP based Sparse Coding

Kim, H., Tang, H. & Park, J., 2019 Jul, International Symposium on Low Power Electronics and Design, ISLPED 2019. Institute of Electrical and Electronics Engineers Inc., 8824938. (Proceedings of the International Symposium on Low Power Electronics and Design; vol. 2019-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low Cost Hardware Implementation of LEA-128 Encryption using Bit-Serial Technique

Choi, B., Kim, B. & Park, J., 2019 Feb 22, Proceedings - International SoC Design Conference 2018, ISOCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 46-47 2 p. 8649937. (Proceedings - International SoC Design Conference 2018, ISOCC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low cost ternary content addressable memory based on early termination precharge scheme

Lee, K., Ko, G. & Park, J., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702372. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Sensitivity based error resilient techniques for energy efficient deep neural network accelerators

Choi, W., Shin, D., Park, J. & Ghosh, S., 2019 Jun 2, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a204. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Spin Orbit Torque-RAM Write Energy Reduction with Self-Verification Scheme

Kim, T. & Park, J., 2019 Feb 22, Proceedings - International SoC Design Conference 2018, ISOCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 19-20 2 p. 8649942. (Proceedings - International SoC Design Conference 2018, ISOCC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2018

An efficient convolutional neural networks design with heterogeneous SRAM cell sizing

Choi, W. & Park, J., 2018 May 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 103-104 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Charge-Recycling based Redundant Write Prevention Technique for Low Power SOT-MRAM

Kang, G., Jang, Y. & Park, J., 2018 Apr 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-May. 8351277

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Content addressable memory based binarized neural network accelerator using time-domain signal processing

Choi, W., Jeong, K., Choi, K., Lee, K. & Park, J., 2018 Jun 24, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a138

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Half-and-Half Compare Content Addressable Memory with Charge-Sharing Based Selective Match-Line Precharge Scheme

Choi, W., Kim, H., Park, C., Song, T. & Park, J., 2018 Oct 22, 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-June. p. 17-18 2 p. 8502311

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

Choi, W., Lee, K. & Park, J., 2018 Apr 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-May. 8351461

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Spike Counts Based Low Complexity Learning with Binary Synapse

Tang, H., Kim, H., Cho, D. & Park, J., 2018 Oct 10, 2018 International Joint Conference on Neural Networks, IJCNN 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-July. 8489486

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Spin orbit torque device based stochastic multi-bit synapses for on-chip STDP learning

Kang, G., Jang, Y. & Park, J., 2018 Jul 23, ISLPED 2018 - Proceedings of the 2018 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., a21

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2017

A compact multi-mode CORDIC with Global-Shifting-Sum (GSS) method

Jung, G., Choi, K. & Park, J., 2017 Jan 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 180-183 4 p. 7803927

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A DRAM based physical unclonable function capable of generating >1032 Challenge Response Pairs per 1Kbit array for secure chip authentication

Tang, Q., Zhou, C., Choi, W., Kang, G., Park, J., Parhi, K. K. & Kim, C. H., 2017 Jul 26, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-April. 7993610

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Bit-width reduction and customized register for low cost convolutional neural network accelerator

Choi, K., Choi, W., Shin, K. & Park, J., 2017 Aug 11, ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 8009164

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)
2016

A inversion-less peterson algorithm based shared KES architecture for concatenated BCH decoder

An, S., Tang, H. & Park, J., 2016 Feb 8, ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE). Institute of Electrical and Electronics Engineers Inc., p. 281-282 2 p. 7401757

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Customized SRAM design for low power video code applications

Lee, S., Tang, H., Choi, K. & Park, J., 2016 Dec 27, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., p. 79-80 2 p. 7799742

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Domain Wall Memory based Convolutional Neural Networks for Bit-width Extendability and Energy-Efficiency

Chung, J., Park, J. & Ghosh, S., 2016 Aug 8, ISLPED 2016 - Proceedings of the 2016 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., p. 332-337 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Low complexity massive MIMO detection architecture based on Neumann method

Kang, B., Yoon, J. H. & Park, J., 2016 Feb 8, ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE). Institute of Electrical and Electronics Engineers Inc., p. 293-294 2 p. 7401703

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)
2015

A hybrid multimode BCH encoder architecture for area efficient re-encoding approach

Tang, H., Jung, G. & Park, J., 2015 Jul 27, Proceedings - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. p. 1997-2000 4 p. 7169067

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Domain Wall Memory based Digital Signal processors for area and energy-efficiency

Chung, J., Ramclam, K., Park, J. & Ghosh, S., 2015 Jul 24, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. 7167248

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Dynamic stability estimation for latch-type voltage sense amplifier

Choi, W., Park, J. & Kang, G., 2015 Apr 16, ISOCC 2014 - International SoC Design Conference. Institute of Electrical and Electronics Engineers Inc., p. 218-219 2 p. 7087614

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Gram-schmidt tailed high-throughput QR decomposition architecture for MIMO detector

Shin, D., Yoon, J. H., Park, J. & Choi, W., 2015 Apr 16, ISOCC 2014 - International SoC Design Conference. Institute of Electrical and Electronics Engineers Inc., p. 264-265 2 p. 7087639

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Self-correcting STTRAM under magnetic field attacks

Jang, J. W., Park, J., Ghosh, S. & Bhunia, S., 2015 Jul 24, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. 7167261

Research output: Chapter in Book/Report/Conference proceedingConference contribution

23 Citations (Scopus)
2014

A low-complexity composite QR decomposition architecture for MIMO detector

Yoon, J. H., Shin, D. & Park, J., 2014 Jan 1, Proceedings - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., p. 1692-1695 4 p. 6865479

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)
2013

Multidimensional Householder based high-speed QR decomposition architecture for MIMO receivers

Kurniawan, I. H., Yoon, J. H. & Park, J., 2013, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. p. 2159-2162 4 p. 6572302. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Reconfigurable ECC for adaptive protection of memory

Basak, A., Paul, S., Park, J., Park, J. & Bhunia, S., 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013. p. 1085-1088 4 p. 6674841. (Midwest Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)
2011

Improved MIMO SIC detection exploiting ML criterion

Choi, J. W., Lee, J., Lou, H. L. & Park, J., 2011, 2011 IEEE Vehicular Technology Conference Fall, VTC Fall 2011 - Proceedings. 6093071. (IEEE Vehicular Technology Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Variation-aware low-power video processor design techniques

Rim, W., Kwon, J. & Park, J., 2011, 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 6026671. (Midwest Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2010

A low power all-digital PLL with power optimized digitally controlled oscillator

Lee, D. C., Kim, K. Y., Min, Y. J., Kim, K. M., Abdullah, A., Park, J. & Kim, S. W., 2010, 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010. 5713739. (2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Applications of TMR devices in solid state circuits and systems

Chen, Y., Li, H., Wang, X. & Park, J., 2010, 2010 International SoC Design Conference, ISOCC 2010. p. 252-255 4 p. 5682923. (2010 International SoC Design Conference, ISOCC 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Digital signal processing in bio-implantable systems: Design challenges and emerging solutions

Narasimhan, S., Park, J. & Bhunia, S., 2010, Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. p. 223-229 7 p. 5548247. (Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2006

Dynamic bit-width adaptation in DCT: Image quality versus computation energy trade-off

Jongsun, P., Jung, H. C. & Roy, K., 2006, Proceedings - Design, Automation and Test in Europe, DATE'06. 1656936. (Proceedings -Design, Automation and Test in Europe, DATE; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)
2002

DCT processor architecture based on computation sharing

Kwon, S., Park, J. & Roy, K., 2002, ICCSC 2002 - 1st IEEE International Conference on Circuits and Systems for Communications, Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2002-June. p. 162-165 4 p. 1029070

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
2000

Non-Adaptive and adaptive filter implementation based on sharing multiplication

Park, J., Choo, H., Muhammad, K., Choi, S. H., Im, Y. & Roy, K., 2000, Signal Processing Theory and Methods I. Institute of Electrical and Electronics Engineers Inc., p. 460-463 4 p. 862012. (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)