A smart power IC is designed with lateral DMOSFETs and fabricated in 1.2-μm non-epi CMOS process. Since digitally controlled PWM scheme is utilized with a high-speed clock frequency, the designed smart IC is suitable for high-speed CD-ROM applications which require fast tracking and high-precision motor control. The smart power IC also combines a step-down DC-to-DC converter and a linear regulator which has a zero fold-back current capability. A self-isolated lateral DMOSFET cell with minimum process change is realized with a pitch size of 16 μm which results to an extremely low specific on-resistance of 0.39 mΩ-cm2. The active die area occupies 19.1 mm2.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|Publication status||Published - 1996|
|Event||Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA|
Duration: 1996 May 12 → 1996 May 15
ASJC Scopus subject areas
- Electrical and Electronic Engineering