1.8 GHz CMOS frequency synthesizer with high-speed VCO for PCS receivers

Soon Seob Lee, Seong Ho Yoon, Bo Eun Kim, Soo Won Kim

Research output: Contribution to journalConference article


This paper presents a 1.8 GHz CMOS frequency synthesizer with high-speed on-chip VCO for PCS (Personal Communication System) receiver. The proposed 4-stage ring VCO is designed to minimize loading effects, and it generates I and Q signals up to 1.865 GHz. Synthesizer realized with 0.6 μm CMOS technology is tested and compared to the conventional scheme. The jitter of the synthesizer is 24 psec(rms), and phase noise is -48.15 dBc/30 kHz at 885 kHz offset from 1.834 GHz carrier frequency.

Original languageEnglish
Pages (from-to)164-165
Number of pages2
JournalDigest of Technical Papers - IEEE International Conference on Consumer Electronics
Publication statusPublished - 1998 Jan 1
EventProceedings of the 1998 17th Conference on Consumer Electronics - Los Angeles, CA, USA
Duration: 1998 Jun 21998 Jun 4

ASJC Scopus subject areas

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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