260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology

D. Yoon, M. G. Seo, K. Song, M. Kaynak, B. Tillack, Jae-Sung Rieh

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 × 160 μm2 excluding Baluns and probing pads.

Original languageEnglish
Pages (from-to)194-196
Number of pages3
JournalElectronics Letters
Volume53
Issue number3
DOIs
Publication statusPublished - 2017 Feb 2

Fingerprint

Differential amplifiers
Heterojunction bipolar transistors
Transistors
Bias voltage
Inductance
Energy dissipation
Tuning
Topology

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology. / Yoon, D.; Seo, M. G.; Song, K.; Kaynak, M.; Tillack, B.; Rieh, Jae-Sung.

In: Electronics Letters, Vol. 53, No. 3, 02.02.2017, p. 194-196.

Research output: Contribution to journalArticle

Yoon, D. ; Seo, M. G. ; Song, K. ; Kaynak, M. ; Tillack, B. ; Rieh, Jae-Sung. / 260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology. In: Electronics Letters. 2017 ; Vol. 53, No. 3. pp. 194-196.
@article{9c37fa012e7d4c3bb42238e12052bc90,
title = "260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology",
abstract = "A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 × 160 μm2 excluding Baluns and probing pads.",
author = "D. Yoon and Seo, {M. G.} and K. Song and M. Kaynak and B. Tillack and Jae-Sung Rieh",
year = "2017",
month = "2",
day = "2",
doi = "10.1049/el.2016.3882",
language = "English",
volume = "53",
pages = "194--196",
journal = "Electronics Letters",
issn = "0013-5194",
publisher = "Institution of Engineering and Technology",
number = "3",

}

TY - JOUR

T1 - 260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology

AU - Yoon, D.

AU - Seo, M. G.

AU - Song, K.

AU - Kaynak, M.

AU - Tillack, B.

AU - Rieh, Jae-Sung

PY - 2017/2/2

Y1 - 2017/2/2

N2 - A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 × 160 μm2 excluding Baluns and probing pads.

AB - A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 × 160 μm2 excluding Baluns and probing pads.

UR - http://www.scopus.com/inward/record.url?scp=85011890611&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85011890611&partnerID=8YFLogxK

U2 - 10.1049/el.2016.3882

DO - 10.1049/el.2016.3882

M3 - Article

AN - SCOPUS:85011890611

VL - 53

SP - 194

EP - 196

JO - Electronics Letters

JF - Electronics Letters

SN - 0013-5194

IS - 3

ER -