366-kS/s 1.09-nJ 0.0013-m mm2 frequency-to-Digital converter based CMOS temperature sensor utilizing multiphase clock

Kisoo Kim; Hokyu Lee; Chulwoo Kim

doi:10.1109/TVLSI.2012.2220389

366-kS/s 1.09-nJ 0.0013-m mm² frequency-to-Digital converter based CMOS temperature sensor utilizing multiphase clock

Kisoo Kim, Hokyu Lee, Chulwoo Kim

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

23 Citations (Scopus)

Abstract

A smart temperature sensor in 65-nm CMOS, utilizing CMOS ring oscillators, consumes 1.09 nJ at a conversion rate of 366 kS/s. This is achieved by the direct temperature-to-digital conversion method implemented in the frequency-to-digital converter. The algorithm utilized in the fine code generator makes it possible to increase the resolution of the sensor efficiently. Compared to previous work, this brief shows lower VDD operation. After one point calibration, the chip-to-chip spread is + 2.7̃-2.9 °C over the temperature range of-40 °C to 110 °C.

Original language	English
Article number	6338359
Pages (from-to)	1950-1954
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	21
Issue number	10
DOIs	https://doi.org/10.1109/TVLSI.2012.2220389
Publication status	Published - 2013

Keywords

Compensation
PVT variation
frequency-to-digital converter
oscillator
temperature sensor

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/TVLSI.2012.2220389

Cite this

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title = "366-kS/s 1.09-nJ 0.0013-m mm2 frequency-to-Digital converter based CMOS temperature sensor utilizing multiphase clock",

abstract = "A smart temperature sensor in 65-nm CMOS, utilizing CMOS ring oscillators, consumes 1.09 nJ at a conversion rate of 366 kS/s. This is achieved by the direct temperature-to-digital conversion method implemented in the frequency-to-digital converter. The algorithm utilized in the fine code generator makes it possible to increase the resolution of the sensor efficiently. Compared to previous work, this brief shows lower VDD operation. After one point calibration, the chip-to-chip spread is + 2.{\~7}-2.9 °C over the temperature range of-40 °C to 110 °C.",

keywords = "Compensation, PVT variation, frequency-to-digital converter, oscillator, temperature sensor",

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AB - A smart temperature sensor in 65-nm CMOS, utilizing CMOS ring oscillators, consumes 1.09 nJ at a conversion rate of 366 kS/s. This is achieved by the direct temperature-to-digital conversion method implemented in the frequency-to-digital converter. The algorithm utilized in the fine code generator makes it possible to increase the resolution of the sensor efficiently. Compared to previous work, this brief shows lower VDD operation. After one point calibration, the chip-to-chip spread is + 2.7̃-2.9 °C over the temperature range of-40 °C to 110 °C.

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