A 0.004mm2 portable multiphase clock generator tile for 1.2GHz RISC microprocessor

Inhwa Jung, Gunok Jung, Janghoon Song, Moo Young Kim, Junyoung Park, Sung Bae Park, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)


A portable multiphase clock generator capable of adjusting its clock phase according to input clock frequencies has been developed. It consists of a full-digital CMOS circuit that leads to a simple, robust, and portable IP. One-cycle lock time enables clock-on-demand circuit structures. The implemented low power clock generator tile occupies only 0.004mm and operates at variable input frequencies ranging from 625MHz to 1.2GHz.

Original languageEnglish
Title of host publication2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Number of pages2
Publication statusPublished - 2006
Externally publishedYes
Event2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States
Duration: 2006 Jun 152006 Jun 17

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers


Other2006 Symposium on VLSI Circuits, VLSIC
Country/TerritoryUnited States
CityHonolulu, HI

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


Dive into the research topics of 'A 0.004mm<sup>2</sup> portable multiphase clock generator tile for 1.2GHz RISC microprocessor'. Together they form a unique fingerprint.

Cite this