A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces

Youngwook Kwon; Hyunsu Park; Yoonjae Choi; Jincheol Sim; Jonghyuck Choi; Seungwoo Park; Chulwoo Kim

doi:10.1109/TCSII.2022.3159769

A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces

Youngwook Kwon, Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Seungwoo Park, Chulwoo Kim

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

This brief presents a 1-tap pre-emphasis transmitter (TX) for a single-ended ground-terminated memory interface with 28 nm complementary metal-oxide-semiconductor (CMOS) technology. By employing a charge pump scheme, a voltage level below ground was used to remove inter-symbol interference (ISI). Encoded with the unit interval (UI) delayed data, the proposed equalization technique increases the vertical voltage margin for the receiver (RX) compared to conventional feed-forward equalization (FFE). In addition, the short current after equalization was removed, and impedance matching for reflection was facilitated. The data rate of the proposed work is 15 Gb/s, and the data path power dissipation for the entire design is 20.3 mW. The measured energy efficiency is 1.35 pJ/bit, and the total area occupation is 0.008 mm2.

Original language	English
Pages (from-to)	2737-2741
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	69
Issue number	6
DOIs	https://doi.org/10.1109/TCSII.2022.3159769
Publication status	Published - 2022 Jun 1

Keywords

Asymmetric interface
CMOS
dynamic random-access memory (DRAM)
equalization
transmitter

ASJC Scopus subject areas

Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/TCSII.2022.3159769

Cite this

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title = "A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces",

abstract = "This brief presents a 1-tap pre-emphasis transmitter (TX) for a single-ended ground-terminated memory interface with 28 nm complementary metal-oxide-semiconductor (CMOS) technology. By employing a charge pump scheme, a voltage level below ground was used to remove inter-symbol interference (ISI). Encoded with the unit interval (UI) delayed data, the proposed equalization technique increases the vertical voltage margin for the receiver (RX) compared to conventional feed-forward equalization (FFE). In addition, the short current after equalization was removed, and impedance matching for reflection was facilitated. The data rate of the proposed work is 15 Gb/s, and the data path power dissipation for the entire design is 20.3 mW. The measured energy efficiency is 1.35 pJ/bit, and the total area occupation is 0.008 mm2. ",

keywords = "Asymmetric interface, CMOS, dynamic random-access memory (DRAM), equalization, transmitter",

author = "Youngwook Kwon and Hyunsu Park and Yoonjae Choi and Jincheol Sim and Jonghyuck Choi and Seungwoo Park and Chulwoo Kim",

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AU - Kwon, Youngwook

AU - Park, Hyunsu

AU - Choi, Yoonjae

AU - Sim, Jincheol

AU - Choi, Jonghyuck

AU - Park, Seungwoo

AU - Kim, Chulwoo

PY - 2022/6/1

Y1 - 2022/6/1

N2 - This brief presents a 1-tap pre-emphasis transmitter (TX) for a single-ended ground-terminated memory interface with 28 nm complementary metal-oxide-semiconductor (CMOS) technology. By employing a charge pump scheme, a voltage level below ground was used to remove inter-symbol interference (ISI). Encoded with the unit interval (UI) delayed data, the proposed equalization technique increases the vertical voltage margin for the receiver (RX) compared to conventional feed-forward equalization (FFE). In addition, the short current after equalization was removed, and impedance matching for reflection was facilitated. The data rate of the proposed work is 15 Gb/s, and the data path power dissipation for the entire design is 20.3 mW. The measured energy efficiency is 1.35 pJ/bit, and the total area occupation is 0.008 mm2.

AB - This brief presents a 1-tap pre-emphasis transmitter (TX) for a single-ended ground-terminated memory interface with 28 nm complementary metal-oxide-semiconductor (CMOS) technology. By employing a charge pump scheme, a voltage level below ground was used to remove inter-symbol interference (ISI). Encoded with the unit interval (UI) delayed data, the proposed equalization technique increases the vertical voltage margin for the receiver (RX) compared to conventional feed-forward equalization (FFE). In addition, the short current after equalization was removed, and impedance matching for reflection was facilitated. The data rate of the proposed work is 15 Gb/s, and the data path power dissipation for the entire design is 20.3 mW. The measured energy efficiency is 1.35 pJ/bit, and the total area occupation is 0.008 mm2.

KW - Asymmetric interface

KW - CMOS

KW - dynamic random-access memory (DRAM)

KW - equalization

KW - transmitter

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JO - IEEE Transactions on Circuits and Systems I: Regular Papers

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ER -

A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces

Abstract

Keywords

ASJC Scopus subject areas

UN SDGs

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