Abstract
In this brief, a 16-Gb/s receiver with a chargeredistribution decision-feedback equalizer (CR DFE) is presented. The proposed CR DFE does not suffer from a voltage headroom issue because it uses charges on the capacitors rather than the current source. Hence, the power consumption is significantly reduced compared with the current-steering DFE. In addition, as the CR DFE tracks the signal and immediately compensates for the inter-symbol interference (ISI), the DFE loop delay is minimized. The equalized output maintains the input commonmode voltage level and signal swing. The CR DFE core fabricated in a 28-nm CMOS technology consumes only 0.38 mA from a 1-V supply at 16 Gb/s and compensates for a 12.5-dB ISI channel. An FoM of 0.0019 pJ/bit/dB was achieved, which is significantly better than the state-of-the-art technologies.
| Original language | English |
|---|---|
| Pages (from-to) | 1 |
| Number of pages | 1 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| DOIs | |
| Publication status | Accepted/In press - 2022 |
Keywords
- Capacitors
- Clocks
- Decision feedback equalizers
- Delays
- Gain
- Receiver (RX)
- Switches
- Voltage
- charge redistribution
- charge-steering logic
- decision-feedback equalizer (DFE)
- differential signaling
- equalizer (EQ)
- inter-symbol interference (ISI)
- non-return-to-zero (NRZ)
ASJC Scopus subject areas
- Electrical and Electronic Engineering