A 1.62-5.4-Gb/s Receiver for DisplayPort Version 1.2a with Adaptive Equalization and Referenceless Frequency Acquisition Techniques

Sewook Hwang, Junyoung Song, Yeonho Lee, Chulwoo Kim

Research output: Contribution to journalArticlepeer-review

10 Citations (Scopus)

Abstract

We present a 1.62-5.4-Gb/s receiver for DisplayPort version 1.2a and propose an adaptive equalizer (EQ) with a peak-level comparison technique for eye measurement. A single comparator and an up/down unmatched-current charge pump are used to realize a simpler EQ architecture with low power dissipation. A referenceless frequency acquisition technique is also proposed. A time-to-digital converter-based pulsewidth detector supports the referenceless frequency acquisition within the range of 1.62-5.4 Gb/s. An XOR-gate-embedded charge pump and a half-rate linear phase detector were used to improve the jitter tolerance (JTOL) performance. The measured eye opening of the proposed EQ at 5.4 Gb/s was 0.68 UI with a-20-dB loss channel. The proposed receiver passed all the JTOL tests of the DisplayPort compliance specification version 1.2b. The power consumption of the receiver was 36.8 mW at 5.4 Gb/s. The receiver occupied a core area of 0.265 mm2 using 65-nm CMOS process technology.

Original languageEnglish
Article number7932968
Pages (from-to)2691-2702
Number of pages12
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume64
Issue number10
DOIs
Publication statusPublished - 2017 Oct

Keywords

  • DisplayPort
  • Receiver (Rx)
  • adaptive equalizer (EQ)
  • clock and data recovery (CDR)
  • compliance test
  • frequency detector
  • referenceless

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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