We present a 1.62-5.4-Gb/s receiver for DisplayPort version 1.2a and propose an adaptive equalizer (EQ) with a peak-level comparison technique for eye measurement. A single comparator and an up/down unmatched-current charge pump are used to realize a simpler EQ architecture with low power dissipation. A referenceless frequency acquisition technique is also proposed. A time-to-digital converter-based pulsewidth detector supports the referenceless frequency acquisition within the range of 1.62-5.4 Gb/s. An XOR-gate-embedded charge pump and a half-rate linear phase detector were used to improve the jitter tolerance (JTOL) performance. The measured eye opening of the proposed EQ at 5.4 Gb/s was 0.68 UI with a -20-dB loss channel. The proposed receiver passed all the JTOL tests of the DisplayPort compliance specification version 1.2b. The power consumption of the receiver was 36.8 mW at 5.4 Gb/s. The receiver occupied a core area of 0.265 mm² using 65-nm CMOS process technology.
|Journal||IEEE Transactions on Circuits and Systems I: Regular Papers|
|Publication status||Accepted/In press - 2017 May 23|
ASJC Scopus subject areas
- Electrical and Electronic Engineering