This paper proposes a 2.5 V supply, 4 μW low-power delta-sigma modulator for implantable cardiac pacemaker system. Periodic bias current reduction technique is proposed to reduce the power consumption of delta-sigma modulator implemented with switched-capacitor integrator. 2nd order delta-sigma modulator exploiting mosfets operating in moderate inversion region is fabricated in a CMOS 0.25 um process. Measurement results of delta-sigma converter show a power dissipation of 4 uW, and 46 dB of peak SNR in a 128 Hz signal bandwidth.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|Publication status||Published - 2007|
|Event||2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States|
Duration: 2007 May 27 → 2007 May 30
ASJC Scopus subject areas
- Electrical and Electronic Engineering