A 2.5-V 4-μW low-power delta-sigma modulator for implantable cardiac pacemaker with periodic bias current reduction technique

Chae Ryung Kim, Yu R. Kang, Young J. Min, Soo-Won Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper proposes a 2.5 V supply, 4 μW low-power delta-sigma modulator for implantable cardiac pacemaker system. Periodic bias current reduction technique is proposed to reduce the power consumption of delta-sigma modulator implemented with switched-capacitor integrator. 2 nd order delta-sigma modulator exploiting mosfets operating in moderate inversion region is fabricated in a CMOS 0.25 um process. Measurement results of delta-sigma converter show a power dissipation of 4 uW, and 46 dB of peak SNR in a 128 Hz signal bandwidth.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Pages333-336
Number of pages4
Publication statusPublished - 2007
Event2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States
Duration: 2007 May 272007 May 30

Other

Other2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
CountryUnited States
CityNew Orleans, LA
Period07/5/2707/5/30

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kim, C. R., Kang, Y. R., Min, Y. J., & Kim, S-W. (2007). A 2.5-V 4-μW low-power delta-sigma modulator for implantable cardiac pacemaker with periodic bias current reduction technique. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 333-336). [4252639]