A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface

Hyun Woo Lee, Soo Bin Lim, Junyoung Song, Ja Beom Koo, Dae Han Kwon, Jong Ho Kang, Yunsaing Kim, Young Jung Choi, Kunwoo Park, Byong Tae Chung, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

The process variation among 512 DRAM samples is more than 30% [1]. The performance variation of general circuits is predicted to be over 60% in 2012 [2]. In general, a single-die-based DRAM has a large process variation from chip to chip, which among other parameters, causes tAC (address access time) variation in the application system. In order to reduce the tAC variation, most highspeed SDRAMs adopt a delay-locked loop (DLL) at the cost of additional area and power consumption. For TSV-based stacked dies, large tAC variantion results in higher power consumption due to short circuit current from data conflicts among shared I/Os. Since the number of I/Os for TSV-based stacked DRAM (TSV DRAM) might be 512 or more [3], the additional power consumption can be very high. Even though it is desirable in mobile DRAM to exclude the DLL because of the power cost [3], TSV DRAM for high-speed operation partially adopts a DLL in the master die [4]. Our DLL-based data self-aligner (DBDA) reduces the data conflict time among stacked dies, consuming 283.2μW during read operation at 800Mb/s/pin. It dissipates 4.98μW in self-refresh mode with the help of leakage-current-reduction controller.

Original languageEnglish
Title of host publication2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers
Pages48-49
Number of pages2
DOIs
Publication statusPublished - 2012
Event59th International Solid-State Circuits Conference, ISSCC 2012 - San Francisco, CA, United States
Duration: 2012 Feb 192012 Feb 23

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume55
ISSN (Print)0193-6530

Other

Other59th International Solid-State Circuits Conference, ISSCC 2012
CountryUnited States
CitySan Francisco, CA
Period12/2/1912/2/23

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface'. Together they form a unique fingerprint.

  • Cite this

    Lee, H. W., Lim, S. B., Song, J., Koo, J. B., Kwon, D. H., Kang, J. H., Kim, Y., Choi, Y. J., Park, K., Chung, B. T., & Kim, C. (2012). A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface. In 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers (pp. 48-49). [6176873] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 55). https://doi.org/10.1109/ISSCC.2012.6176873