TY - GEN
T1 - A 3.3 V, 8.89 μa and 5.5 ppm/°C CMOS bandgap voltage reference for power telemetry in retinal prosthesis systems
AU - Zawawi, Ruhaifi Abdullah
AU - Kim, Jae Kun
AU - Park, Jong Bum
AU - Kim, Seong Woo
AU - Manaf, Asrulnizam Abd
AU - Kim, Jungsuk
N1 - Funding Information:
ACKNOWLEDGMENT The authors would like to express their sincerest appreciation to the IC Design Education Center for chip fabrication. This work was supported by the National Research Foundation of Korea NRF-2017M3A9E2056461.
Funding Information:
*Research is supported by the the National Research Foundation of Korea.
PY - 2018/10/26
Y1 - 2018/10/26
N2 - A 3.3 V CMOS bandgap reference (BGR) was presented in this study that utilizes MOS transistors operating in the sub-threshold region. The complexity of the circuit and the dependency of the voltage reference on power supply variations are simultaneously decreased through the use of a new compensation circuit technique. The proposed BGR is simulated using a 0.35 μm CMOS standard process. Consequently, a 5.53 ppm/°C temperature coefficient is obtained in the -40∼+125 °C temperature range, the maximum power supply rejection ratio is - 62 dB, and a 2.033 mV/V voltage line regulation is achieved for the 2.3∼ 4.3 V supply voltage. The proposed circuit dissipates a supply current of 8.89 IJA at a 3.3 V supply voltage, and the active area is 112 μm× 60 μm.
AB - A 3.3 V CMOS bandgap reference (BGR) was presented in this study that utilizes MOS transistors operating in the sub-threshold region. The complexity of the circuit and the dependency of the voltage reference on power supply variations are simultaneously decreased through the use of a new compensation circuit technique. The proposed BGR is simulated using a 0.35 μm CMOS standard process. Consequently, a 5.53 ppm/°C temperature coefficient is obtained in the -40∼+125 °C temperature range, the maximum power supply rejection ratio is - 62 dB, and a 2.033 mV/V voltage line regulation is achieved for the 2.3∼ 4.3 V supply voltage. The proposed circuit dissipates a supply current of 8.89 IJA at a 3.3 V supply voltage, and the active area is 112 μm× 60 μm.
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U2 - 10.1109/EMBC.2018.8513090
DO - 10.1109/EMBC.2018.8513090
M3 - Conference contribution
C2 - 30441023
AN - SCOPUS:85056617257
T3 - Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBS
SP - 2977
EP - 2980
BT - 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2018
Y2 - 18 July 2018 through 21 July 2018
ER -