A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in network-on-chip based applications

Phi Hung Pham, Phuong Mau, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

This paper presents the design of a 64-PE foldedtorus intra-chip communication fabric used to provide guaranteed throughput in terms of dead- and live-lock free and in-order data delivery, which is suitable for NoC-based real-time processing applications. A test chip using the proposed intra-chip communication fabric designed to integrate 64 RISC-based processing elements is fabricated in 1P6M 0.13μm CMOS technology with 23mm2 die area. At room temperature, the measured peak power (all PE-tiles activated) of the test chip is 200mW@128MHz at 1.2Vcc. The intra-chip network consuming 9.4% the chip area and 18% of the total chip power can provide a maximum bisection bandwidth of 44.6Gb/s with an approximate energy per transported bit of 0.14 pJ/bit/hop.

Original languageEnglish
Title of host publicationProceedings of the Custom Integrated Circuits Conference
Pages645-648
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Event2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
Duration: 2009 Sep 132009 Sep 16

Other

Other2009 IEEE Custom Integrated Circuits Conference, CICC '09
CountryUnited States
CitySan Jose, CA
Period09/9/1309/9/16

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Pham, P. H., Mau, P., & Kim, C. (2009). A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in network-on-chip based applications. In Proceedings of the Custom Integrated Circuits Conference (pp. 645-648). [5280748] https://doi.org/10.1109/CICC.2009.5280748