A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer

Junyoung Song, Sewook Hwang, Chulwoo Kim, Sang Geun Bae

Research output: Contribution to journalArticle

Abstract

In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 μm 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.

Original languageEnglish
Pages (from-to)529-536
Number of pages8
JournalAnalog Integrated Circuits and Signal Processing
Volume81
Issue number2
DOIs
Publication statusPublished - 2014 Jan 1

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Jitter
Transmitters
Electric potential
Networks (circuits)

ASJC Scopus subject areas

  • Surfaces, Coatings and Films
  • Hardware and Architecture
  • Signal Processing

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A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer. / Song, Junyoung; Hwang, Sewook; Kim, Chulwoo; Bae, Sang Geun.

In: Analog Integrated Circuits and Signal Processing, Vol. 81, No. 2, 01.01.2014, p. 529-536.

Research output: Contribution to journalArticle

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