A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer

Junyoung Song; Sewook Hwang; Chulwoo Kim; Sang Geun Bae

doi:10.1007/s10470-014-0407-9

A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer

Junyoung Song, Sewook Hwang, Chulwoo Kim, Sang Geun Bae

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 μm 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.

Original language	English
Pages (from-to)	529-536
Number of pages	8
Journal	Analog Integrated Circuits and Signal Processing
Volume	81
Issue number	2
DOIs	https://doi.org/10.1007/s10470-014-0407-9
Publication status	Published - 2014 Oct 22

Keywords

Data-dependent jitter
DisplayPort
High-speed serial link
Output driver
Pre-emphasis

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

Access to Document

10.1007/s10470-014-0407-9

Cite this

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title = "A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer",

abstract = "In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 μm 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.",

keywords = "Data-dependent jitter, DisplayPort, High-speed serial link, Output driver, Pre-emphasis",

author = "Junyoung Song and Sewook Hwang and Chulwoo Kim and Bae, {Sang Geun}",

note = "Funding Information: Acknowledgments This work was supported by the System Semiconductor Technology Development Program (No.10041082) funded by the Ministry of Knowledge Economy(MKE, Korea). Publisher Copyright: {\textcopyright} 2014, Springer Science+Business Media New York.",

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AU - Bae, Sang Geun

N1 - Funding Information: Acknowledgments This work was supported by the System Semiconductor Technology Development Program (No.10041082) funded by the Ministry of Knowledge Economy(MKE, Korea). Publisher Copyright: © 2014, Springer Science+Business Media New York.

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N2 - In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 μm 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.

AB - In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 μm 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.

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