A charge-recycling assist technique for reliable and low power SRAM Design

Woong Choi, Jongsun Park

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

This paper presents a novel charge-recycling SRAM assist circuit to reduce the dynamic power consumption of SRAM assist technique. By collaboratively combining the read and write assist schemes, the wasted charge in conventional read assist circuit can be efficiently recycled in write assist technique. In order to compare the dynamic power consumption at ISO minimum operating voltage (MIN) condition, the most probable failure point (MPFP) simulations are performed using 14 nm FinFET technology model. Compared to the conventional assist schemes, thanks to the charge-recycling, 41% power saving, and 2.3% area reduction can be achieved by using the proposed SRAM assist circuit.

Original languageEnglish
Article number7524740
Pages (from-to)1164-1175
Number of pages12
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume63
Issue number8
DOIs
Publication statusPublished - 2016 Aug 1

Fingerprint

Static random access storage
Recycling
Networks (circuits)
Electric power utilization
Electric potential

Keywords

  • Assist
  • capacitive coupling
  • charge-recycling
  • read stability
  • SRAM
  • variation
  • write ability

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

A charge-recycling assist technique for reliable and low power SRAM Design. / Choi, Woong; Park, Jongsun.

In: IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 63, No. 8, 7524740, 01.08.2016, p. 1164-1175.

Research output: Contribution to journalArticle

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