A D-band multiplier-based OOK transceiver with supplementary transistor modeling in 65-nm bulk CMOS technology

Bohee Suh, Hyunkyu Lee, Sooyeon Kim, Sanggeun Jeon

Research output: Contribution to journalArticle

Abstract

A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor fmax and reduce dc power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a dc-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and an on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz1/2 over all D-band frequencies. The dc power consumption of the transmitter and the receiver is 76 and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations and demonstrates data transmission up to 10 and 2 Gb/s at a distance of 0.03 m, respectively.

Original languageEnglish
Article number8603724
Pages (from-to)7783-7793
Number of pages11
JournalIEEE Access
Volume7
DOIs
Publication statusPublished - 2019 Jan 1

Fingerprint

Transceivers
Transmitters
Transistors
Electric power utilization
Frequency multiplying circuits
Differential amplifiers
Power amplifiers
Data communication systems
Frequency bands
Detectors
Networks (circuits)
Air
Amplitude shift keying
Costs

Keywords

  • D-band
  • low-cost bulk CMOS
  • OOK
  • transceiver
  • transistor modeling
  • wireless communication

ASJC Scopus subject areas

  • Computer Science(all)
  • Materials Science(all)
  • Engineering(all)

Cite this

A D-band multiplier-based OOK transceiver with supplementary transistor modeling in 65-nm bulk CMOS technology. / Suh, Bohee; Lee, Hyunkyu; Kim, Sooyeon; Jeon, Sanggeun.

In: IEEE Access, Vol. 7, 8603724, 01.01.2019, p. 7783-7793.

Research output: Contribution to journalArticle

@article{d6ffdbb31a3147e2ac597ce4f0b00262,
title = "A D-band multiplier-based OOK transceiver with supplementary transistor modeling in 65-nm bulk CMOS technology",
abstract = "A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor fmax and reduce dc power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a dc-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and an on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz1/2 over all D-band frequencies. The dc power consumption of the transmitter and the receiver is 76 and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations and demonstrates data transmission up to 10 and 2 Gb/s at a distance of 0.03 m, respectively.",
keywords = "D-band, low-cost bulk CMOS, OOK, transceiver, transistor modeling, wireless communication",
author = "Bohee Suh and Hyunkyu Lee and Sooyeon Kim and Sanggeun Jeon",
year = "2019",
month = "1",
day = "1",
doi = "10.1109/ACCESS.2018.2889165",
language = "English",
volume = "7",
pages = "7783--7793",
journal = "IEEE Access",
issn = "2169-3536",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - A D-band multiplier-based OOK transceiver with supplementary transistor modeling in 65-nm bulk CMOS technology

AU - Suh, Bohee

AU - Lee, Hyunkyu

AU - Kim, Sooyeon

AU - Jeon, Sanggeun

PY - 2019/1/1

Y1 - 2019/1/1

N2 - A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor fmax and reduce dc power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a dc-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and an on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz1/2 over all D-band frequencies. The dc power consumption of the transmitter and the receiver is 76 and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations and demonstrates data transmission up to 10 and 2 Gb/s at a distance of 0.03 m, respectively.

AB - A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor fmax and reduce dc power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a dc-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and an on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz1/2 over all D-band frequencies. The dc power consumption of the transmitter and the receiver is 76 and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations and demonstrates data transmission up to 10 and 2 Gb/s at a distance of 0.03 m, respectively.

KW - D-band

KW - low-cost bulk CMOS

KW - OOK

KW - transceiver

KW - transistor modeling

KW - wireless communication

UR - http://www.scopus.com/inward/record.url?scp=85060696114&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85060696114&partnerID=8YFLogxK

U2 - 10.1109/ACCESS.2018.2889165

DO - 10.1109/ACCESS.2018.2889165

M3 - Article

VL - 7

SP - 7783

EP - 7793

JO - IEEE Access

JF - IEEE Access

SN - 2169-3536

M1 - 8603724

ER -