A high speed low-power accumulator for direct digital frequency synthesizer

Yong Sin Kim, Sung Mo Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

A high speed low-power 32-bit accumulator for direct digital frequency synthesizer (DDFS) is presented. The DDFS consists of a phase accumulator, a phase-to-sine amplitude converter, and a D/A converter. For accumulator design, high speed pipelining scheme is commonly used to increase throughput and to reduce power consumption. Our design decreases power consumption and the number of registers down to 24% and 37% of the conventional pipelined accumulator.

Original languageEnglish
Title of host publicationIEEE MTT-S International Microwave Symposium Digest
Pages502-505
Number of pages4
DOIs
Publication statusPublished - 2006
Externally publishedYes
Event2006 IEEE MTT-S International Microwave Symposium Digest - San Francisco, CA, United States
Duration: 2006 Jun 112006 Jun 16

Other

Other2006 IEEE MTT-S International Microwave Symposium Digest
CountryUnited States
CitySan Francisco, CA
Period06/6/1106/6/16

Fingerprint

frequency synthesizers
Frequency synthesizers
accumulators
Electric power utilization
high speed
converters
Throughput
registers

Keywords

  • Accumulator
  • Direct digital frequency synthesizer (DDFS)
  • Gated clock
  • Low power
  • Pipelining

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

Kim, Y. S., & Kang, S. M. (2006). A high speed low-power accumulator for direct digital frequency synthesizer. In IEEE MTT-S International Microwave Symposium Digest (pp. 502-505). [4014944] https://doi.org/10.1109/MWSYM.2006.249620

A high speed low-power accumulator for direct digital frequency synthesizer. / Kim, Yong Sin; Kang, Sung Mo.

IEEE MTT-S International Microwave Symposium Digest. 2006. p. 502-505 4014944.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kim, YS & Kang, SM 2006, A high speed low-power accumulator for direct digital frequency synthesizer. in IEEE MTT-S International Microwave Symposium Digest., 4014944, pp. 502-505, 2006 IEEE MTT-S International Microwave Symposium Digest, San Francisco, CA, United States, 06/6/11. https://doi.org/10.1109/MWSYM.2006.249620
Kim YS, Kang SM. A high speed low-power accumulator for direct digital frequency synthesizer. In IEEE MTT-S International Microwave Symposium Digest. 2006. p. 502-505. 4014944 https://doi.org/10.1109/MWSYM.2006.249620
Kim, Yong Sin ; Kang, Sung Mo. / A high speed low-power accumulator for direct digital frequency synthesizer. IEEE MTT-S International Microwave Symposium Digest. 2006. pp. 502-505
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