Abstract
This paper presents a low complexity QR decomposition (QRD) architecture for MIMO detector. In the proposed approach, various CORDIC-based QRD algorithms are efficiently combined together to reduce the computational complexity of the QRD hardware. Based on the computational complexity analysis on various QRD algorithms, a low complexity approach is selected at each stage of QRD process. The proposed QRD architecture can be applied to any arbitrary dimension of channel matrix, and the complexity reduction grows with the increasing matrix dimension. Our QR decomposition hardware was implemented using Samsung 0.13 technology. The numerical results show that the proposed architecture achieves 47% increase in the QAR (QRD Rate/Gate count) with 28.1% power savings over the conventional Householder CORDIC-based architecture for the 4×4 matrix decomposition.
Original language | English |
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Title of host publication | Proceedings - IEEE International Symposium on Circuits and Systems |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1692-1695 |
Number of pages | 4 |
ISBN (Print) | 9781479934324 |
DOIs | |
Publication status | Published - 2014 Jan 1 |
Event | 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 2014 Jun 1 → 2014 Jun 5 |
Other
Other | 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 |
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Country/Territory | Australia |
City | Melbourne, VIC |
Period | 14/6/1 → 14/6/5 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering