Abstract
A power reduction scheme that uses AC termination at RX and a TX output driver with an active inductor part (AIP) is proposed for a point-to-point post-LPDDR4 interface at 8 Gb/s. AC termination at the receiver I/O can reduce the power consumption by preventing DC power loss. However, this causes inter symbol interference (ISI), owing to the difference in gain depending on the frequency. Thus, AC termination generates more jitter, which results in a smaller eye-opening than the conventional on-die termination (ODT). The AIP in the TX output driver reduces the low-frequency gain and the ISI caused by the AC termination. This reduces the jitter and improves the eye-opening. The proposed AIP allows to change the frequency range by adjusting the resistance (RAI), capacitance (CAI), and the size of the MOSFET according to the resistance (Rac) and capacitance (Cac) used in the AC termination at the RX. In this paper, the AC termination at the RX and the AIP in the TX were implemented in a 28-nm CMOS process and operated at 8 Gb/s with a 3 inch FR4 microstrip line including a board, and a socket model. The proposed transceiver chip achieves a peak-to-peak jitter of 43.6 ps and power reduction of 31% compared with chips without AC termination and AIP.
| Original language | English |
|---|---|
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| DOIs | |
| Publication status | Accepted/In press - 2017 Sep 4 |
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Keywords
- AC termination
- active inductor
- Active inductors
- de-emphasis
- I/O
- Impedance
- inter symbol interference
- Jitter
- MOS devices
- near-ground signaling(NGS)
- on-die termination
- post-LPDDR4.
- Power demand
- Random access memory
- Transmitters
ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
A Low-Power Post-LPDDR4 Interface Using AC Termination at RX and an Active Inductor at TX. / Yoo, Jeongsik; Lee, Yeonho; Choi, Yoonjae; Park, Hyunsu; Park, Sanghune; Kim, Chulwoo.
In: IEEE Transactions on Circuits and Systems II: Express Briefs, 04.09.2017.Research output: Contribution to journal › Article
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TY - JOUR
T1 - A Low-Power Post-LPDDR4 Interface Using AC Termination at RX and an Active Inductor at TX
AU - Yoo, Jeongsik
AU - Lee, Yeonho
AU - Choi, Yoonjae
AU - Park, Hyunsu
AU - Park, Sanghune
AU - Kim, Chulwoo
PY - 2017/9/4
Y1 - 2017/9/4
N2 - A power reduction scheme that uses AC termination at RX and a TX output driver with an active inductor part (AIP) is proposed for a point-to-point post-LPDDR4 interface at 8 Gb/s. AC termination at the receiver I/O can reduce the power consumption by preventing DC power loss. However, this causes inter symbol interference (ISI), owing to the difference in gain depending on the frequency. Thus, AC termination generates more jitter, which results in a smaller eye-opening than the conventional on-die termination (ODT). The AIP in the TX output driver reduces the low-frequency gain and the ISI caused by the AC termination. This reduces the jitter and improves the eye-opening. The proposed AIP allows to change the frequency range by adjusting the resistance (RAI), capacitance (CAI), and the size of the MOSFET according to the resistance (Rac) and capacitance (Cac) used in the AC termination at the RX. In this paper, the AC termination at the RX and the AIP in the TX were implemented in a 28-nm CMOS process and operated at 8 Gb/s with a 3 inch FR4 microstrip line including a board, and a socket model. The proposed transceiver chip achieves a peak-to-peak jitter of 43.6 ps and power reduction of 31% compared with chips without AC termination and AIP.
AB - A power reduction scheme that uses AC termination at RX and a TX output driver with an active inductor part (AIP) is proposed for a point-to-point post-LPDDR4 interface at 8 Gb/s. AC termination at the receiver I/O can reduce the power consumption by preventing DC power loss. However, this causes inter symbol interference (ISI), owing to the difference in gain depending on the frequency. Thus, AC termination generates more jitter, which results in a smaller eye-opening than the conventional on-die termination (ODT). The AIP in the TX output driver reduces the low-frequency gain and the ISI caused by the AC termination. This reduces the jitter and improves the eye-opening. The proposed AIP allows to change the frequency range by adjusting the resistance (RAI), capacitance (CAI), and the size of the MOSFET according to the resistance (Rac) and capacitance (Cac) used in the AC termination at the RX. In this paper, the AC termination at the RX and the AIP in the TX were implemented in a 28-nm CMOS process and operated at 8 Gb/s with a 3 inch FR4 microstrip line including a board, and a socket model. The proposed transceiver chip achieves a peak-to-peak jitter of 43.6 ps and power reduction of 31% compared with chips without AC termination and AIP.
KW - AC termination
KW - active inductor
KW - Active inductors
KW - de-emphasis
KW - I/O
KW - Impedance
KW - inter symbol interference
KW - Jitter
KW - MOS devices
KW - near-ground signaling(NGS)
KW - on-die termination
KW - post-LPDDR4.
KW - Power demand
KW - Random access memory
KW - Transmitters
UR - http://www.scopus.com/inward/record.url?scp=85029156328&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85029156328&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2017.2748986
DO - 10.1109/TCSII.2017.2748986
M3 - Article
AN - SCOPUS:85029156328
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
SN - 1549-8328
ER -