A low spurious 14.4mW 1.8GHz CMOS FVC-based clock generator for portable SoC processors

Gil Su Kim, Chulwoo Kim, Soo Won Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A 60MHz to 1.8GHz frequency-to-voltage converter (FVC)-based clock generator is fabricated in a 0.18-μm CMOS process for portable SoC processors. The clock generator employs the FVC and a VCO to reduce power and jitter simultaneously, which achieves spurious tone of -54.1dBc, rms jitter of 1.497ps and peak-to-peak jitter of 11.6ps with maximum power consumption of 14.4mW at 1.8V supply.

Original languageEnglish
Title of host publication2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Pages308-311
Number of pages4
DOIs
Publication statusPublished - 2007
Event2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju, Korea, Republic of
Duration: 2007 Nov 122007 Nov 14

Publication series

Name2007 IEEE Asian Solid-State Circuits Conference, A-SSCC

Other

Other2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
CountryKorea, Republic of
CityJeju
Period07/11/1207/11/14

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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