A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory

Kwan Ho Kim, Hyung Youl Park, Jaewoo Shim, Gicheol Shin, Maksim Andreev, Jiwan Koo, Gwangwe Yoo, Kilsu Jung, Keun Heo, Yoonmyung Lee, Hyun Yong Yu, Kyung Rok Kim, Jeong Ho Cho, Sungjoo Lee, Jin Hong Park

Research output: Contribution to journalArticle

Abstract

For increasing the restricted bit-density in the conventional binary logic system, extensive research efforts have been directed toward implementing single devices with a two threshold voltage (VTH) characteristic via the single negative differential resistance (NDR) phenomenon. In particular, recent advances in forming van der Waals (vdW) heterostructures with two-dimensional crystals have opened up new possibilities for realizing such NDR-based tunneling devices. However, it has been challenging to exhibit three VTH through the multiple-NDR (m-NDR) phenomenon in a single device even by using vdW heterostructures. Here, we show the m-NDR device formed on a BP/(ReS2 + HfS2) type-III double-heterostructure. This m-NDR device is then integrated with a vdW transistor to demonstrate a ternary vdW latch circuit capable of storing three logic states. Finally, the ternary latch is extended toward ternary SRAM, and its high-speed write and read operations are theoretically verified.

Original languageEnglish
Pages (from-to)654-662
Number of pages9
JournalNanoscale Horizons
Volume5
Issue number4
DOIs
Publication statusPublished - 2020 Apr

ASJC Scopus subject areas

  • Materials Science(all)

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  • Cite this

    Kim, K. H., Park, H. Y., Shim, J., Shin, G., Andreev, M., Koo, J., Yoo, G., Jung, K., Heo, K., Lee, Y., Yu, H. Y., Kim, K. R., Cho, J. H., Lee, S., & Park, J. H. (2020). A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory. Nanoscale Horizons, 5(4), 654-662. https://doi.org/10.1039/c9nh00631a