A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Sangsu Lee, Jaehun Jun, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2017, ISOCC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages180-181
Number of pages2
ISBN (Electronic)9781538622858
DOIs
Publication statusPublished - 2018 May 29
Event14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of
Duration: 2017 Nov 52017 Nov 8

Other

Other14th International SoC Design Conference, ISOCC 2017
CountryKorea, Republic of
CitySeoul
Period17/11/517/11/8

Fingerprint

Phase locked loops
Threshold voltage
Electric potential
Electric power utilization
Networks (circuits)

Keywords

  • All-Digital Phase-Locked Loop(ADPLL)
  • Bootstrapped Ring Oscillator(BTRO)
  • Low-Dropout Regulator(LDO)
  • Near-Threshold Voltage(NTV)
  • Power Supply Rejection(PSR)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Lee, S., Jun, J., & Kim, C. (2018). A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. In Proceedings - International SoC Design Conference 2017, ISOCC 2017 (pp. 180-181). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2017.8368869

A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. / Lee, Sangsu; Jun, Jaehun; Kim, Chulwoo.

Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 180-181.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lee, S, Jun, J & Kim, C 2018, A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. in Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., pp. 180-181, 14th International SoC Design Conference, ISOCC 2017, Seoul, Korea, Republic of, 17/11/5. https://doi.org/10.1109/ISOCC.2017.8368869
Lee S, Jun J, Kim C. A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. In Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc. 2018. p. 180-181 https://doi.org/10.1109/ISOCC.2017.8368869
Lee, Sangsu ; Jun, Jaehun ; Kim, Chulwoo. / A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 180-181
@inproceedings{563b1f3f7cef4ee0a08350e87509ec1a,
title = "A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations",
abstract = "Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.",
keywords = "All-Digital Phase-Locked Loop(ADPLL), Bootstrapped Ring Oscillator(BTRO), Low-Dropout Regulator(LDO), Near-Threshold Voltage(NTV), Power Supply Rejection(PSR)",
author = "Sangsu Lee and Jaehun Jun and Chulwoo Kim",
year = "2018",
month = "5",
day = "29",
doi = "10.1109/ISOCC.2017.8368869",
language = "English",
pages = "180--181",
booktitle = "Proceedings - International SoC Design Conference 2017, ISOCC 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

AU - Lee, Sangsu

AU - Jun, Jaehun

AU - Kim, Chulwoo

PY - 2018/5/29

Y1 - 2018/5/29

N2 - Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.

AB - Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.

KW - All-Digital Phase-Locked Loop(ADPLL)

KW - Bootstrapped Ring Oscillator(BTRO)

KW - Low-Dropout Regulator(LDO)

KW - Near-Threshold Voltage(NTV)

KW - Power Supply Rejection(PSR)

UR - http://www.scopus.com/inward/record.url?scp=85048872982&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85048872982&partnerID=8YFLogxK

U2 - 10.1109/ISOCC.2017.8368869

DO - 10.1109/ISOCC.2017.8368869

M3 - Conference contribution

AN - SCOPUS:85048872982

SP - 180

EP - 181

BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017

PB - Institute of Electrical and Electronics Engineers Inc.

ER -