A reconfigurable processor infrastructure for accelerating java applications

Youngsun Han, Seok Joong Hwang, Seon Wook Kim

Research output: Contribution to journalArticle

Abstract

In this paper, we present a reconfigurable processor infrastructure to accelerate Java applications, called Jaguar. The Jaguar infrastructure consists of a compiler framework and a runtime environme support. The compiler framework selects a group of Java methods to be translated into hardware for delivering the best performance under limite resources, and translates the selected Java methods into Verilog synthesi able code modules. The runtime environment support includes the Java virtual machine (JVM) running on a host processor to provide Java execu tion environment to the generated Java accelerator through communicati interface units while preserving Java semantics. Our compiler infrastruc ture is a tightly integrated and solid compiler-aided solution for Java reconfigurable computing. There is no limitation in generating synthesizab Verilog modules from any Java application while preserving Java seman tics. In terms of performance, our infrastructure achieves the speedup by 5.4 times on average and by up to 9.4 times in measured benchmarks with respect to JVM-only execution. Furthermore, two optimization scheme such as an instruction folding and a live buffer removal can reduce 24% on average and up to 39% of the resource consumptio.

Original languageEnglish
Pages (from-to)2091-2100
Number of pages10
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE91-A
Issue number8
DOIs
Publication statusPublished - 2008 Aug 1

Fingerprint

Computer hardware description languages
Java
Infrastructure
Particle accelerators
Compiler
Semantics
Hardware
Java Virtual Machine
Reconfigurable Computing
Virtual machine
Module
Resources
Accelerator
Folding
Accelerate
Buffer
Speedup
Benchmark
Unit
Optimization

Keywords

  • Compiler framework
  • Java
  • Reconfigurable processor
  • VerilogHD

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Applied Mathematics
  • Signal Processing

Cite this

A reconfigurable processor infrastructure for accelerating java applications. / Han, Youngsun; Hwang, Seok Joong; Kim, Seon Wook.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 8, 01.08.2008, p. 2091-2100.

Research output: Contribution to journalArticle

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