A reliable CMOS 16: 1 binary-tree multiplexer applying delay compensation techniques

Kwansu Shon, Jae Tack Yoo, Soo Won Kim

Research output: Contribution to journalArticlepeer-review

Abstract

This paper describes a CMOS 16:1 binary-tree multiplexer (MUX) using 0.18-μm technology. To provide immunity for wide frequency range and process-and-temperature variations, the MUX adopts several delay compensation techniques. Simulation results show that, the proposed MUX maintains the set up margins and hold margins close to the optimal value, i.e., 0.5UI, in wide frequency-range and in wide process-and-temperature variations, with standard deviation of 0.05UI approximately. These results represent that these proposed delay compensations are effective and the reliability is much improved although CMOS logic circuits are sensitive to those variations.

Original languageEnglish
Pages (from-to)536-541
Number of pages6
Journalieice electronics express
Volume4
Issue number17
DOIs
Publication statusPublished - 2007 Sep 10

Keywords

  • Binary-tree
  • Delay-compensation
  • Multiplexer

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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