A study of stress-induced p+/n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology

Joo Hyoung Lee, Sung Hyung Park, Key Min Lee, Ki Seok Youn, Young Jin Park, Chel Jong Choi, Tae Yeon Seong, Hi Deok Lee

Research output: Contribution to journalArticle

22 Citations (Scopus)

Abstract

We have clarified that mechanical stress combined with shallower junction at the active edge is the main cause of junction leakage current failure of shallow p+/n salicided junctions for sub-0.15-μm CMOS technology, especially those with narrow active width. Mechanical stress results in the penetration of a Self-Aligned siLICIDE (SALICIDE) layer at the corner region of narrow active line. Moreover, a novel electrochemical etching with TEM shows shallower junctions at the active edge due to the bending up of the junction profile. We found that the application of a shallow trench isolation (STI), top corner rounding (TCR) process suppresses the mechanical stress of STI's top corner and thus eliminates the stress-induced p+/n salicided junction leakage failure. Furthermore, we optimized the Co SALICIDE process using a Ge+ pre-amorphization in narrow p+/n salicided junction.

Original languageEnglish
Pages (from-to)1985-1992
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume49
Issue number11
DOIs
Publication statusPublished - 2002 Nov 1
Externally publishedYes

Fingerprint

p-n junctions
CMOS
leakage
combined stress
Electrochemical etching
Amorphization
Leakage currents
isolation
penetration
etching
Transmission electron microscopy
transmission electron microscopy
causes
profiles

Keywords

  • 2-D junction profile
  • Atomic force microscopy (AFM)
  • Ge pre-amorphization implant (PAI)
  • P/n salicided junction
  • SALICIDE penetration
  • Stress-induced leakage failure
  • Top corner rounding (TCR)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

Cite this

A study of stress-induced p+/n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology. / Lee, Joo Hyoung; Park, Sung Hyung; Lee, Key Min; Youn, Ki Seok; Park, Young Jin; Choi, Chel Jong; Seong, Tae Yeon; Lee, Hi Deok.

In: IEEE Transactions on Electron Devices, Vol. 49, No. 11, 01.11.2002, p. 1985-1992.

Research output: Contribution to journalArticle

Lee, Joo Hyoung ; Park, Sung Hyung ; Lee, Key Min ; Youn, Ki Seok ; Park, Young Jin ; Choi, Chel Jong ; Seong, Tae Yeon ; Lee, Hi Deok. / A study of stress-induced p+/n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology. In: IEEE Transactions on Electron Devices. 2002 ; Vol. 49, No. 11. pp. 1985-1992.
@article{ca9799b4634448529b8fe1478d0d4e4a,
title = "A study of stress-induced p+/n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology",
abstract = "We have clarified that mechanical stress combined with shallower junction at the active edge is the main cause of junction leakage current failure of shallow p+/n salicided junctions for sub-0.15-μm CMOS technology, especially those with narrow active width. Mechanical stress results in the penetration of a Self-Aligned siLICIDE (SALICIDE) layer at the corner region of narrow active line. Moreover, a novel electrochemical etching with TEM shows shallower junctions at the active edge due to the bending up of the junction profile. We found that the application of a shallow trench isolation (STI), top corner rounding (TCR) process suppresses the mechanical stress of STI's top corner and thus eliminates the stress-induced p+/n salicided junction leakage failure. Furthermore, we optimized the Co SALICIDE process using a Ge+ pre-amorphization in narrow p+/n salicided junction.",
keywords = "2-D junction profile, Atomic force microscopy (AFM), Ge pre-amorphization implant (PAI), P/n salicided junction, SALICIDE penetration, Stress-induced leakage failure, Top corner rounding (TCR)",
author = "Lee, {Joo Hyoung} and Park, {Sung Hyung} and Lee, {Key Min} and Youn, {Ki Seok} and Park, {Young Jin} and Choi, {Chel Jong} and Seong, {Tae Yeon} and Lee, {Hi Deok}",
year = "2002",
month = "11",
day = "1",
doi = "10.1109/TED.2002.804704",
language = "English",
volume = "49",
pages = "1985--1992",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "11",

}

TY - JOUR

T1 - A study of stress-induced p+/n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology

AU - Lee, Joo Hyoung

AU - Park, Sung Hyung

AU - Lee, Key Min

AU - Youn, Ki Seok

AU - Park, Young Jin

AU - Choi, Chel Jong

AU - Seong, Tae Yeon

AU - Lee, Hi Deok

PY - 2002/11/1

Y1 - 2002/11/1

N2 - We have clarified that mechanical stress combined with shallower junction at the active edge is the main cause of junction leakage current failure of shallow p+/n salicided junctions for sub-0.15-μm CMOS technology, especially those with narrow active width. Mechanical stress results in the penetration of a Self-Aligned siLICIDE (SALICIDE) layer at the corner region of narrow active line. Moreover, a novel electrochemical etching with TEM shows shallower junctions at the active edge due to the bending up of the junction profile. We found that the application of a shallow trench isolation (STI), top corner rounding (TCR) process suppresses the mechanical stress of STI's top corner and thus eliminates the stress-induced p+/n salicided junction leakage failure. Furthermore, we optimized the Co SALICIDE process using a Ge+ pre-amorphization in narrow p+/n salicided junction.

AB - We have clarified that mechanical stress combined with shallower junction at the active edge is the main cause of junction leakage current failure of shallow p+/n salicided junctions for sub-0.15-μm CMOS technology, especially those with narrow active width. Mechanical stress results in the penetration of a Self-Aligned siLICIDE (SALICIDE) layer at the corner region of narrow active line. Moreover, a novel electrochemical etching with TEM shows shallower junctions at the active edge due to the bending up of the junction profile. We found that the application of a shallow trench isolation (STI), top corner rounding (TCR) process suppresses the mechanical stress of STI's top corner and thus eliminates the stress-induced p+/n salicided junction leakage failure. Furthermore, we optimized the Co SALICIDE process using a Ge+ pre-amorphization in narrow p+/n salicided junction.

KW - 2-D junction profile

KW - Atomic force microscopy (AFM)

KW - Ge pre-amorphization implant (PAI)

KW - P/n salicided junction

KW - SALICIDE penetration

KW - Stress-induced leakage failure

KW - Top corner rounding (TCR)

UR - http://www.scopus.com/inward/record.url?scp=0036866032&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0036866032&partnerID=8YFLogxK

U2 - 10.1109/TED.2002.804704

DO - 10.1109/TED.2002.804704

M3 - Article

AN - SCOPUS:0036866032

VL - 49

SP - 1985

EP - 1992

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

SN - 0018-9383

IS - 11

ER -