Access region locality for high-bandwidth processor memory system design

Sangyeun Cho, Pen Chang Yew, Kyung Ho Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

This paper studies an interesting yet less explored behavior of memory access instructions, called access region locality. Unlike the traditional temporal and spatial data locality that focuses on individual memory locations and how accesses to the locations are inter-related, the access region locality concerns with each static memory instruction and its range of access locations at run time. We consider program's data, heap, and stack regions in this paper. Our experimental study using a set of SPEC95 benchmark programs shows that most memory reference instructions access a single region at run time. Also shown is that it is possible to accurately predict the access region of a memory instruction at run time by scrutinizing the addressing mode of the instruction and the past access region history of it. A simple run-time access region predictor is developed that is similar to a branch predictor in structure. We describe and evaluate a superscalar processor with two distinct sets of memory pipelines, driven by the access region predictor. Experimental results indicate that the proposed mechanism is very effective in providing high memory bandwidth to the processor, resulting in comparable or better performance than a conventional memory design with a heavily multi-ported data cache that can lead to much higher hardware complexity.

Original languageEnglish
Title of host publicationProceedings of the Annual International Symposium on Microarchitecture
PublisherIEEE
Pages136-146
Number of pages11
Publication statusPublished - 1999
Externally publishedYes
EventProceedings of the 1999 32nd Annual ACM/IEEE International Symposium on Microarchitecture, MICRO-32 - Haifa, Isr
Duration: 1999 Nov 161999 Nov 18

Other

OtherProceedings of the 1999 32nd Annual ACM/IEEE International Symposium on Microarchitecture, MICRO-32
CityHaifa, Isr
Period99/11/1699/11/18

Fingerprint

Systems analysis
Bandwidth
Data storage equipment
Pipelines
Hardware

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

Cite this

Cho, S., Yew, P. C., & Lee, K. H. (1999). Access region locality for high-bandwidth processor memory system design. In Proceedings of the Annual International Symposium on Microarchitecture (pp. 136-146). IEEE.

Access region locality for high-bandwidth processor memory system design. / Cho, Sangyeun; Yew, Pen Chang; Lee, Kyung Ho.

Proceedings of the Annual International Symposium on Microarchitecture. IEEE, 1999. p. 136-146.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cho, S, Yew, PC & Lee, KH 1999, Access region locality for high-bandwidth processor memory system design. in Proceedings of the Annual International Symposium on Microarchitecture. IEEE, pp. 136-146, Proceedings of the 1999 32nd Annual ACM/IEEE International Symposium on Microarchitecture, MICRO-32, Haifa, Isr, 99/11/16.
Cho S, Yew PC, Lee KH. Access region locality for high-bandwidth processor memory system design. In Proceedings of the Annual International Symposium on Microarchitecture. IEEE. 1999. p. 136-146
Cho, Sangyeun ; Yew, Pen Chang ; Lee, Kyung Ho. / Access region locality for high-bandwidth processor memory system design. Proceedings of the Annual International Symposium on Microarchitecture. IEEE, 1999. pp. 136-146
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