Adaptive ECC for Tailored Protection of Nanoscale Memory

Dongyeob Shin, Jongsun Park, Jangwon Park, Somnath Paul, Swarup Bhunia

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Editors note:Following technology scaling, runtime failure has emerged as one of the major challenges in modern VLSI designs under the increased parametric variability and low supply voltage. This issue is especially severe in nanoscale memory due to its high density and large capacity. In this work the authors present a novel reconfigurable Error Correction Code (ECC) to improve the reliability of nanoscale memory.

Original languageEnglish
Article number7586136
Pages (from-to)84-93
Number of pages10
JournalIEEE Design and Test
Volume34
Issue number6
DOIs
Publication statusPublished - 2017 Dec 1

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Error correction
Data storage equipment
Electric potential

Keywords

  • Error Correction Code (ECC)
  • Memory Failures
  • Robust Nanoscale Memory
  • Run-time Protection
  • Variable ECC

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Adaptive ECC for Tailored Protection of Nanoscale Memory. / Shin, Dongyeob; Park, Jongsun; Park, Jangwon; Paul, Somnath; Bhunia, Swarup.

In: IEEE Design and Test, Vol. 34, No. 6, 7586136, 01.12.2017, p. 84-93.

Research output: Contribution to journalArticle

Shin, D, Park, J, Park, J, Paul, S & Bhunia, S 2017, 'Adaptive ECC for Tailored Protection of Nanoscale Memory', IEEE Design and Test, vol. 34, no. 6, 7586136, pp. 84-93. https://doi.org/10.1109/MDAT.2016.2615844
Shin, Dongyeob ; Park, Jongsun ; Park, Jangwon ; Paul, Somnath ; Bhunia, Swarup. / Adaptive ECC for Tailored Protection of Nanoscale Memory. In: IEEE Design and Test. 2017 ; Vol. 34, No. 6. pp. 84-93.
@article{2c4e34889458426f8eb6dceedaacd772,
title = "Adaptive ECC for Tailored Protection of Nanoscale Memory",
abstract = "Editors note:Following technology scaling, runtime failure has emerged as one of the major challenges in modern VLSI designs under the increased parametric variability and low supply voltage. This issue is especially severe in nanoscale memory due to its high density and large capacity. In this work the authors present a novel reconfigurable Error Correction Code (ECC) to improve the reliability of nanoscale memory.",
keywords = "Error Correction Code (ECC), Memory Failures, Robust Nanoscale Memory, Run-time Protection, Variable ECC",
author = "Dongyeob Shin and Jongsun Park and Jangwon Park and Somnath Paul and Swarup Bhunia",
year = "2017",
month = "12",
day = "1",
doi = "10.1109/MDAT.2016.2615844",
language = "English",
volume = "34",
pages = "84--93",
journal = "IEEE Design and Test",
issn = "2168-2356",
publisher = "IEEE Computer Society",
number = "6",

}

TY - JOUR

T1 - Adaptive ECC for Tailored Protection of Nanoscale Memory

AU - Shin, Dongyeob

AU - Park, Jongsun

AU - Park, Jangwon

AU - Paul, Somnath

AU - Bhunia, Swarup

PY - 2017/12/1

Y1 - 2017/12/1

N2 - Editors note:Following technology scaling, runtime failure has emerged as one of the major challenges in modern VLSI designs under the increased parametric variability and low supply voltage. This issue is especially severe in nanoscale memory due to its high density and large capacity. In this work the authors present a novel reconfigurable Error Correction Code (ECC) to improve the reliability of nanoscale memory.

AB - Editors note:Following technology scaling, runtime failure has emerged as one of the major challenges in modern VLSI designs under the increased parametric variability and low supply voltage. This issue is especially severe in nanoscale memory due to its high density and large capacity. In this work the authors present a novel reconfigurable Error Correction Code (ECC) to improve the reliability of nanoscale memory.

KW - Error Correction Code (ECC)

KW - Memory Failures

KW - Robust Nanoscale Memory

KW - Run-time Protection

KW - Variable ECC

UR - http://www.scopus.com/inward/record.url?scp=85037732215&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85037732215&partnerID=8YFLogxK

U2 - 10.1109/MDAT.2016.2615844

DO - 10.1109/MDAT.2016.2615844

M3 - Article

AN - SCOPUS:85037732215

VL - 34

SP - 84

EP - 93

JO - IEEE Design and Test

JF - IEEE Design and Test

SN - 2168-2356

IS - 6

M1 - 7586136

ER -