All-2D ReS2 transistors with split gates for logic circuitry

Junyoung Kwon, Yongjun Shin, Hyeokjae Kwon, Jae Yoon Lee, Hyunik Park, Kenji Watanabe, Takashi Taniguchi, Jihyun Kim, Chul-Ho Lee, Seongil Im, Gwan Hyoung Lee

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1 Citation (Scopus)

Abstract

Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDs) and black phosphorus, are the most promising channel materials for future electronics because of their unique electrical properties. Even though a number of 2D-materials-based logic devices have been demonstrated to date, most of them are a combination of more than two unit devices. If logic devices can be realized in a single channel, it would be advantageous for higher integration and functionality. In this study we report high-performance van der Waals heterostructure (vdW) ReS2 transistors with graphene electrodes on atomically flat hBN, and demonstrate a NAND gate comprising a single ReS2 transistor with split gates. Highly sensitive electrostatic doping of ReS2 enables fabrication of gate-tunable NAND logic gates, which cannot be achieved in bulk semiconductor materials because of the absence of gate tunability. The vdW heterostructure NAND gate comprising a single transistor paves a novel way to realize “all-2D” circuitry for flexible and transparent electronic applications.

Original languageEnglish
Article number10354
JournalScientific reports
Volume9
Issue number1
DOIs
Publication statusPublished - 2019 Dec 1

ASJC Scopus subject areas

  • General

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    Kwon, J., Shin, Y., Kwon, H., Lee, J. Y., Park, H., Watanabe, K., Taniguchi, T., Kim, J., Lee, C-H., Im, S., & Lee, G. H. (2019). All-2D ReS2 transistors with split gates for logic circuitry. Scientific reports, 9(1), [10354]. https://doi.org/10.1038/s41598-019-46730-7