An accurate architectural simulator for ARM1136

Hyo Joong Suh, Sung Woo Chung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Cycle-accurate simulators are basic tools to evaluate performance improvements of computer architecture. Before confirming of the architecture improvements using cycle-accurate simulation, the simulator itself should be validated. However, off-the-shelf processors have been continuously improved, though the cycle-accurate simulators were not reflected the improved features. Simulation results show that the difference between the IPC (Instruction Per Cycle) of the modified model for ARM1136 (Sim-ARM1136) and the IPC of the original model for ARM7 (Sim-Outorder) is 19%, on average, which is large enough to mislead the impact of architecture improvements.

Original languageEnglish
Title of host publicationEmbedded and Ubiquitous Computing - International Conference EUC 2005, Proceedings
PublisherSpringer Verlag
Pages331-339
Number of pages9
ISBN (Print)3540308075, 9783540308072
DOIs
Publication statusPublished - 2005
Externally publishedYes
EventInternational Conference on Embedded and Ubiquitous Computing, EUC 2005 - Nagasaki, Japan
Duration: 2005 Dec 62005 Dec 9

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3824 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

OtherInternational Conference on Embedded and Ubiquitous Computing, EUC 2005
CountryJapan
CityNagasaki
Period05/12/605/12/9

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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