Abstract
An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-ofband JTOL of 0.71 UIpp at 100 MHz with
| Original language | English |
|---|---|
| Article number | 2435026 |
| Pages (from-to) | 1092-1103 |
| Number of pages | 12 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 24 |
| Issue number | 3 |
| DOIs | |
| Publication status | Published - 2016 Mar 1 |
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Keywords
- Bit error rate (BER)
- Jitter tolerance (JTOL)
- Real-time jitter tolerance enhancer (JTE)
- Receiver (Rx)
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Hardware and Architecture
- Software
Cite this
An add-on type real-time jitter tolerance enhancer for digital communication receivers. / Hwang, Sewook; Song, Junyoung; Bae, Sang Geun; Lee, Yeonho; Kim, Chulwoo.
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 24, No. 3, 2435026, 01.03.2016, p. 1092-1103.Research output: Contribution to journal › Article
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TY - JOUR
T1 - An add-on type real-time jitter tolerance enhancer for digital communication receivers
AU - Hwang, Sewook
AU - Song, Junyoung
AU - Bae, Sang Geun
AU - Lee, Yeonho
AU - Kim, Chulwoo
PY - 2016/3/1
Y1 - 2016/3/1
N2 - An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-ofband JTOL of 0.71 UIpp at 100 MHz with
AB - An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-ofband JTOL of 0.71 UIpp at 100 MHz with
KW - Bit error rate (BER)
KW - Jitter tolerance (JTOL)
KW - Real-time jitter tolerance enhancer (JTE)
KW - Receiver (Rx)
UR - http://www.scopus.com/inward/record.url?scp=84931086233&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84931086233&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2015.2435026
DO - 10.1109/TVLSI.2015.2435026
M3 - Article
AN - SCOPUS:84931086233
VL - 24
SP - 1092
EP - 1103
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SN - 1063-8210
IS - 3
M1 - 2435026
ER -