An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC

Minseob Shim, Seokhyeon Jeong, Paul Myers, Suyoung Bang, Chulwoo Kim, Dennis Sylvester, David Blaauw, Wanyeong Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper presents a new energy-efficient ring oscillator collapse-based comparator, which is demonstrated in a 15-bit SAR ADC. The comparator automatically adjusts comparison energy according to its input difference without any control, eliminating unnecessary energy spent on coarse comparisons. The employed SAR ADC supplements a 10-bit differential main CDAC with a 5-bit common-mode CDAC. This offers an additional 5 bits of resolution with common mode to differential gain tuning that improves linearity by reducing the effect of switch parasitic capacitance. A test chip fabricated in 40nm CMOS shows 74.12 dB SNDR and 173.4 dB FOMs. The comparator consumes 104 nW with the full ADC consuming 1.17 μW.

Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Volume2016-September
ISBN (Electronic)9781509006342
DOIs
Publication statusPublished - 2016 Sep 21
Event30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 - Honolulu, United States
Duration: 2016 Jun 142016 Jun 17

Other

Other30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
CountryUnited States
CityHonolulu
Period16/6/1416/6/17

Fingerprint

Capacitance
Tuning
Switches
chlorambucil-docosahexaenoic acid conjugate

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Shim, M., Jeong, S., Myers, P., Bang, S., Kim, C., Sylvester, D., ... Jung, W. (2016). An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. In 2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 (Vol. 2016-September). [7573518] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIC.2016.7573518

An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. / Shim, Minseob; Jeong, Seokhyeon; Myers, Paul; Bang, Suyoung; Kim, Chulwoo; Sylvester, Dennis; Blaauw, David; Jung, Wanyeong.

2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016. Vol. 2016-September Institute of Electrical and Electronics Engineers Inc., 2016. 7573518.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Shim, M, Jeong, S, Myers, P, Bang, S, Kim, C, Sylvester, D, Blaauw, D & Jung, W 2016, An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. in 2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016. vol. 2016-September, 7573518, Institute of Electrical and Electronics Engineers Inc., 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016, Honolulu, United States, 16/6/14. https://doi.org/10.1109/VLSIC.2016.7573518
Shim M, Jeong S, Myers P, Bang S, Kim C, Sylvester D et al. An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. In 2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016. Vol. 2016-September. Institute of Electrical and Electronics Engineers Inc. 2016. 7573518 https://doi.org/10.1109/VLSIC.2016.7573518
Shim, Minseob ; Jeong, Seokhyeon ; Myers, Paul ; Bang, Suyoung ; Kim, Chulwoo ; Sylvester, Dennis ; Blaauw, David ; Jung, Wanyeong. / An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. 2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016. Vol. 2016-September Institute of Electrical and Electronics Engineers Inc., 2016.
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