Analysis of electronic memory traps in the oxide-nitride-oxide structure of a polysilicon-oxide-nitride-oxide-semiconductor flash memory

Tae Geun Kim, Y. J. Seo, K. C. Kim, Yun Mo Sung, H. Y. Cho, M. S. Joo, S. H. Pyi

Research output: Contribution to journalArticle

29 Citations (Scopus)


The origin of the electron memory trap in an oxide-nitride-oxide structure deposited on n -type Si is investigated by both capacitance-voltage and deep level transient spectroscopy (DLTS). Two electron traps are observed near 0.27 and 0.54 eV, below the conduction band minimum of Si and are identified as the nitride bulk trap and the Si-Si O2 interfacial trap, respectively. The trap depth, viz., vertical distribution of the electron trap, in both nitride bulk and Si-Si O2 interface, are also estimated from the bias voltage dependent DLTS.

Original languageEnglish
Article number132104
JournalApplied Physics Letters
Issue number13
Publication statusPublished - 2008 Apr 10


ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this