Architectures for particle filtering

Sangjin Hong, Seong-Jun Oh

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

There are many applications in which particle filters outperform traditional signal processing algorithms. Some of these applications include tracking, joint detection and estimation in wireless communication, and computer vision. However, particle filters are not used in practice for these applications mainly because they cannot satisfy real-time requirements. This chapter discusses several important issues in designing an efficient resampling architecture for high throughput parallel particle filtering. The resampling algorithm is developed in order to compensate for possible error caused by finite precision quantization in the resampling step. Communication between the processing elements after resampling is identified as an implementation bottleneck, and therefore, concurrent buffering is incorporated in order to speed up communication of particles among processing elements. The mechanism utilizes a particle-tagging scheme during quantization to compensate possible loss of replicated particles due to the finite precision effect. Particle tagging divides replicated particles into two groups for systematic redistribution of particles to eliminate particle localization in parallel processing. The mechanism utilizes an efficient interconnect topology for guaranteeing complete redistribution of particles even in case of potentialweight unbalance among processing elements. The architecture supports high throughput and ensures that the overall parallel particle filtering execution time scales with the number of processing elements employed.

Original languageEnglish
Title of host publicationHandbook of Signal Processing Systems
Subtitle of host publicationSecond Edition
PublisherSpringer New York
Pages639-670
Number of pages32
ISBN (Electronic)9781461468592
ISBN (Print)9781461468585
DOIs
Publication statusPublished - 2013 Jan 1

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Processing
Communication
Throughput
Computer vision
Signal processing
Topology

ASJC Scopus subject areas

  • Engineering(all)
  • Computer Science(all)

Cite this

Hong, S., & Oh, S-J. (2013). Architectures for particle filtering. In Handbook of Signal Processing Systems: Second Edition (pp. 639-670). Springer New York. https://doi.org/10.1007/978-1-4614-6859-2_20

Architectures for particle filtering. / Hong, Sangjin; Oh, Seong-Jun.

Handbook of Signal Processing Systems: Second Edition. Springer New York, 2013. p. 639-670.

Research output: Chapter in Book/Report/Conference proceedingChapter

Hong, S & Oh, S-J 2013, Architectures for particle filtering. in Handbook of Signal Processing Systems: Second Edition. Springer New York, pp. 639-670. https://doi.org/10.1007/978-1-4614-6859-2_20
Hong S, Oh S-J. Architectures for particle filtering. In Handbook of Signal Processing Systems: Second Edition. Springer New York. 2013. p. 639-670 https://doi.org/10.1007/978-1-4614-6859-2_20
Hong, Sangjin ; Oh, Seong-Jun. / Architectures for particle filtering. Handbook of Signal Processing Systems: Second Edition. Springer New York, 2013. pp. 639-670
@inbook{49f86b37ba654528b4ac0d3bdb290bf4,
title = "Architectures for particle filtering",
abstract = "There are many applications in which particle filters outperform traditional signal processing algorithms. Some of these applications include tracking, joint detection and estimation in wireless communication, and computer vision. However, particle filters are not used in practice for these applications mainly because they cannot satisfy real-time requirements. This chapter discusses several important issues in designing an efficient resampling architecture for high throughput parallel particle filtering. The resampling algorithm is developed in order to compensate for possible error caused by finite precision quantization in the resampling step. Communication between the processing elements after resampling is identified as an implementation bottleneck, and therefore, concurrent buffering is incorporated in order to speed up communication of particles among processing elements. The mechanism utilizes a particle-tagging scheme during quantization to compensate possible loss of replicated particles due to the finite precision effect. Particle tagging divides replicated particles into two groups for systematic redistribution of particles to eliminate particle localization in parallel processing. The mechanism utilizes an efficient interconnect topology for guaranteeing complete redistribution of particles even in case of potentialweight unbalance among processing elements. The architecture supports high throughput and ensures that the overall parallel particle filtering execution time scales with the number of processing elements employed.",
author = "Sangjin Hong and Seong-Jun Oh",
year = "2013",
month = "1",
day = "1",
doi = "10.1007/978-1-4614-6859-2_20",
language = "English",
isbn = "9781461468585",
pages = "639--670",
booktitle = "Handbook of Signal Processing Systems",
publisher = "Springer New York",
address = "United States",

}

TY - CHAP

T1 - Architectures for particle filtering

AU - Hong, Sangjin

AU - Oh, Seong-Jun

PY - 2013/1/1

Y1 - 2013/1/1

N2 - There are many applications in which particle filters outperform traditional signal processing algorithms. Some of these applications include tracking, joint detection and estimation in wireless communication, and computer vision. However, particle filters are not used in practice for these applications mainly because they cannot satisfy real-time requirements. This chapter discusses several important issues in designing an efficient resampling architecture for high throughput parallel particle filtering. The resampling algorithm is developed in order to compensate for possible error caused by finite precision quantization in the resampling step. Communication between the processing elements after resampling is identified as an implementation bottleneck, and therefore, concurrent buffering is incorporated in order to speed up communication of particles among processing elements. The mechanism utilizes a particle-tagging scheme during quantization to compensate possible loss of replicated particles due to the finite precision effect. Particle tagging divides replicated particles into two groups for systematic redistribution of particles to eliminate particle localization in parallel processing. The mechanism utilizes an efficient interconnect topology for guaranteeing complete redistribution of particles even in case of potentialweight unbalance among processing elements. The architecture supports high throughput and ensures that the overall parallel particle filtering execution time scales with the number of processing elements employed.

AB - There are many applications in which particle filters outperform traditional signal processing algorithms. Some of these applications include tracking, joint detection and estimation in wireless communication, and computer vision. However, particle filters are not used in practice for these applications mainly because they cannot satisfy real-time requirements. This chapter discusses several important issues in designing an efficient resampling architecture for high throughput parallel particle filtering. The resampling algorithm is developed in order to compensate for possible error caused by finite precision quantization in the resampling step. Communication between the processing elements after resampling is identified as an implementation bottleneck, and therefore, concurrent buffering is incorporated in order to speed up communication of particles among processing elements. The mechanism utilizes a particle-tagging scheme during quantization to compensate possible loss of replicated particles due to the finite precision effect. Particle tagging divides replicated particles into two groups for systematic redistribution of particles to eliminate particle localization in parallel processing. The mechanism utilizes an efficient interconnect topology for guaranteeing complete redistribution of particles even in case of potentialweight unbalance among processing elements. The architecture supports high throughput and ensures that the overall parallel particle filtering execution time scales with the number of processing elements employed.

UR - http://www.scopus.com/inward/record.url?scp=85026311731&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85026311731&partnerID=8YFLogxK

U2 - 10.1007/978-1-4614-6859-2_20

DO - 10.1007/978-1-4614-6859-2_20

M3 - Chapter

SN - 9781461468585

SP - 639

EP - 670

BT - Handbook of Signal Processing Systems

PB - Springer New York

ER -