In Cache Only Memory Architecture (COMA) for distributed shared memory multiprocessors, the physical location of a datum is completely decoupled from its address by organizing the memory local to each node as a cache for shared address space. As in traditional cache-coherent multiprocessors, the overhead involved in coherence enforcement strongly affects the performance. The overhead seems more pronounced in a COMA machine than the traditional multiprocessors because of its relatively huge size of the local memory acting as cache and the level of memory hierarchy at which coherence needs to be enforced. Using trace driven simulations of the Perfect Club Benchmark Suite, this paper studies the change in the miss ratio and the network traffic with the two coherence policies, update and invalidate. Our study shows that the two policies provide distinct characteristics which reveal different opportunity of improving COMA multiprocessors for different choice of coherence policy.
|Number of pages||5|
|Journal||IEEE Symposium on Parallel and Distributed Processing - Proceedings|
|Publication status||Published - 1995|
|Event||Proceedings of the IEEE 9th International Parallel Processing Symposium - Santa Barbara, CA, USA|
Duration: 1995 Apr 25 → 1995 Apr 28
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