Block processing technique for low power turbo decoder design

Inkyu Lee; Marisa Lopez Vallejo; Syed Aon Mujtaba

doi:10.1109/VTC.2002.1002644

Block processing technique for low power turbo decoder design

Inkyu Lee, Marisa Lopez Vallejo, Syed Aon Mujtaba

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

In this paper we apply a block processing technique to the MAP algorithm used in Turbo decoding. This new technique leads to a power-efficient way to access memory and to a reduced memory size. We introduce the "Very Long Data Word" (VLDW) memory architecture which leads to a reduction in power consumption for memory access operations. The proposed architecture provides a low power implementation of the turbo decoder.

Original language	English
Pages (from-to)	1025-1029
Number of pages	5
Journal	IEEE Vehicular Technology Conference
Volume	2
DOIs	https://doi.org/10.1109/VTC.2002.1002644
Publication status	Published - 2002
Externally published	Yes

ASJC Scopus subject areas

Computer Science Applications
Electrical and Electronic Engineering
Applied Mathematics

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10.1109/VTC.2002.1002644

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abstract = "In this paper we apply a block processing technique to the MAP algorithm used in Turbo decoding. This new technique leads to a power-efficient way to access memory and to a reduced memory size. We introduce the {"}Very Long Data Word{"} (VLDW) memory architecture which leads to a reduction in power consumption for memory access operations. The proposed architecture provides a low power implementation of the turbo decoder.",

author = "Inkyu Lee and Vallejo, {Marisa Lopez} and Mujtaba, {Syed Aon}",

year = "2002",

doi = "10.1109/VTC.2002.1002644",

language = "English",

volume = "2",

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T1 - Block processing technique for low power turbo decoder design

AU - Lee, Inkyu

AU - Vallejo, Marisa Lopez

AU - Mujtaba, Syed Aon

PY - 2002

Y1 - 2002

N2 - In this paper we apply a block processing technique to the MAP algorithm used in Turbo decoding. This new technique leads to a power-efficient way to access memory and to a reduced memory size. We introduce the "Very Long Data Word" (VLDW) memory architecture which leads to a reduction in power consumption for memory access operations. The proposed architecture provides a low power implementation of the turbo decoder.

AB - In this paper we apply a block processing technique to the MAP algorithm used in Turbo decoding. This new technique leads to a power-efficient way to access memory and to a reduced memory size. We introduce the "Very Long Data Word" (VLDW) memory architecture which leads to a reduction in power consumption for memory access operations. The proposed architecture provides a low power implementation of the turbo decoder.

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U2 - 10.1109/VTC.2002.1002644

DO - 10.1109/VTC.2002.1002644

M3 - Article

AN - SCOPUS:0036349039

SN - 0740-0551

VL - 2

SP - 1025

EP - 1029

JO - IEEE Vehicular Technology Conference

JF - IEEE Vehicular Technology Conference

ER -

Block processing technique for low power turbo decoder design

Abstract

ASJC Scopus subject areas

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