Block processing technique for low power turbo decoder design

Inkyu Lee, Marisa Lopez Vallejo, Syed Aon Mujtaba

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In this paper we apply a block processing technique to the MAP algorithm used in Turbo decoding. This new technique leads to a power-efficient way to access memory and to a reduced memory size. We introduce the "Very Long Data Word" (VLDW) memory architecture which leads to a reduction in power consumption for memory access operations. The proposed architecture provides a low power implementation of the turbo decoder.

Original languageEnglish
Title of host publicationIEEE Vehicular Technology Conference
Pages1025-1029
Number of pages5
Volume2
Publication statusPublished - 2002
Externally publishedYes
EventVehicular Technology Conference - Birmingham, AL, United States
Duration: 2002 May 62002 May 9

Other

OtherVehicular Technology Conference
CountryUnited States
CityBirmingham, AL
Period02/5/602/5/9

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Lee, I., Vallejo, M. L., & Mujtaba, S. A. (2002). Block processing technique for low power turbo decoder design. In IEEE Vehicular Technology Conference (Vol. 2, pp. 1025-1029)