Branch predictor design and performance estimation for a high performance embedded microprocessor

Sang Hyuk Lee, Il Kwan Kim, Lynn Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The AE64000 is a 64 bit embedded processor targeting high-end embedded applications such as HDTV, DVD, and 3D graphics. To achieve a higher performance for the AE64000, we design a branch predictor for the processor, and find the optimum parameters for the design through cycle-accurate simulations on SpecINT benchmarks and embedded applications (Dhrystone and Whetstone). In the AE64000, branch prediction is complicated by the instruction folding unit (IFU) of the processor front-end. By predicting on a pre-PC in the IFU, rather than using a PC in the pipeline core, we can effectively eliminate the branch misprediction penalty on a correct prediction. We have developed the AE64000 simulator to evaluate the performance of the designed branch predictor, and selected the optimum branch predictor configuration by considering cost-effectiveness as well as by analyzing the results generated from the AE64000 simulator. The selected branch predictor has been implemented in Verilog and is added to AE64000 pipeline.

Original languageEnglish
Title of host publicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages519-522
Number of pages4
Volume2003-January
ISBN (Print)0780376595
DOIs
Publication statusPublished - 2003
EventAsia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
Duration: 2003 Jan 212003 Jan 24

Other

OtherAsia and South Pacific Design Automation Conference, ASP-DAC 2003
CountryJapan
CityKitakyushu
Period03/1/2103/1/24

Fingerprint

Microprocessor chips
Pipelines
Simulators
Computer hardware description languages
High definition television
Videodisks
Cost effectiveness

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

Cite this

Lee, S. H., Kim, I. K., & Choi, L. (2003). Branch predictor design and performance estimation for a high performance embedded microprocessor. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (Vol. 2003-January, pp. 519-522). [1195072] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2003.1195072

Branch predictor design and performance estimation for a high performance embedded microprocessor. / Lee, Sang Hyuk; Kim, Il Kwan; Choi, Lynn.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2003-January Institute of Electrical and Electronics Engineers Inc., 2003. p. 519-522 1195072.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lee, SH, Kim, IK & Choi, L 2003, Branch predictor design and performance estimation for a high performance embedded microprocessor. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. vol. 2003-January, 1195072, Institute of Electrical and Electronics Engineers Inc., pp. 519-522, Asia and South Pacific Design Automation Conference, ASP-DAC 2003, Kitakyushu, Japan, 03/1/21. https://doi.org/10.1109/ASPDAC.2003.1195072
Lee SH, Kim IK, Choi L. Branch predictor design and performance estimation for a high performance embedded microprocessor. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2003-January. Institute of Electrical and Electronics Engineers Inc. 2003. p. 519-522. 1195072 https://doi.org/10.1109/ASPDAC.2003.1195072
Lee, Sang Hyuk ; Kim, Il Kwan ; Choi, Lynn. / Branch predictor design and performance estimation for a high performance embedded microprocessor. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2003-January Institute of Electrical and Electronics Engineers Inc., 2003. pp. 519-522
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