Cache-aware virtual machine scheduling on multi-core architecture

Cheol Ho Hong, Young Pil Kim, Seehwan Yoo, Chi Young Lee, Hyuck Yoo

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

Facing practical limits to increasing processor frequencies, manufacturers have resorted to multi-core designs in their commercial products. In multi-core implementations, cores in a physical package share the last-level caches to improve inter-core communication. To efficiently exploit this facility, operating systems must employ cache-aware schedulers. Unfortunately, virtualization software, which is a foundation technology of cloud computing, is not yet cache-aware or does not fully exploit the locality of the last-level caches. In this paper, we propose a cache-aware virtual machine scheduler for multi-core architectures. The proposed scheduler exploits the locality of the last-level caches to improve the performance of concurrent applications running on virtual machines. For this purpose, we provide a space-partitioning algorithm that migrates and clusters communicating virtual CPUs (VCPUs) in the same cache domain. Second, we provide a time-partitioning algorithm that co-schedules or schedules in sequence clustered VCPUs. Finally, we present a theoretical analysis that proves our scheduling algorithm is more efficient in supporting concurrent applications than the default credit scheduler in Xen. We implemented our virtual machine scheduler in the recent Xen hypervisor with para-virtualized Linux-based operating systems. We show that our approach can improve performance of concurrent virtual machines by up to 19% compared to the credit scheduler.

Original languageEnglish
Pages (from-to)2377-2392
Number of pages16
JournalIEICE Transactions on Information and Systems
VolumeE95-D
Issue number10
DOIs
Publication statusPublished - 2012 Oct 1

Fingerprint

Scheduling
Program processors
Computer operating systems
Cloud computing
Scheduling algorithms
Virtual machine
Communication

Keywords

  • Cache-aware scheduling strategy
  • Multi-core processor
  • Virtualization

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Software
  • Artificial Intelligence
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition

Cite this

Cache-aware virtual machine scheduling on multi-core architecture. / Hong, Cheol Ho; Kim, Young Pil; Yoo, Seehwan; Lee, Chi Young; Yoo, Hyuck.

In: IEICE Transactions on Information and Systems, Vol. E95-D, No. 10, 01.10.2012, p. 2377-2392.

Research output: Contribution to journalArticle

Hong, Cheol Ho ; Kim, Young Pil ; Yoo, Seehwan ; Lee, Chi Young ; Yoo, Hyuck. / Cache-aware virtual machine scheduling on multi-core architecture. In: IEICE Transactions on Information and Systems. 2012 ; Vol. E95-D, No. 10. pp. 2377-2392.
@article{cba397831bdd4fbdb5e95d9c6550fae9,
title = "Cache-aware virtual machine scheduling on multi-core architecture",
abstract = "Facing practical limits to increasing processor frequencies, manufacturers have resorted to multi-core designs in their commercial products. In multi-core implementations, cores in a physical package share the last-level caches to improve inter-core communication. To efficiently exploit this facility, operating systems must employ cache-aware schedulers. Unfortunately, virtualization software, which is a foundation technology of cloud computing, is not yet cache-aware or does not fully exploit the locality of the last-level caches. In this paper, we propose a cache-aware virtual machine scheduler for multi-core architectures. The proposed scheduler exploits the locality of the last-level caches to improve the performance of concurrent applications running on virtual machines. For this purpose, we provide a space-partitioning algorithm that migrates and clusters communicating virtual CPUs (VCPUs) in the same cache domain. Second, we provide a time-partitioning algorithm that co-schedules or schedules in sequence clustered VCPUs. Finally, we present a theoretical analysis that proves our scheduling algorithm is more efficient in supporting concurrent applications than the default credit scheduler in Xen. We implemented our virtual machine scheduler in the recent Xen hypervisor with para-virtualized Linux-based operating systems. We show that our approach can improve performance of concurrent virtual machines by up to 19{\%} compared to the credit scheduler.",
keywords = "Cache-aware scheduling strategy, Multi-core processor, Virtualization",
author = "Hong, {Cheol Ho} and Kim, {Young Pil} and Seehwan Yoo and Lee, {Chi Young} and Hyuck Yoo",
year = "2012",
month = "10",
day = "1",
doi = "10.1587/transinf.E95.D.2377",
language = "English",
volume = "E95-D",
pages = "2377--2392",
journal = "IEICE Transactions on Information and Systems",
issn = "0916-8532",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "10",

}

TY - JOUR

T1 - Cache-aware virtual machine scheduling on multi-core architecture

AU - Hong, Cheol Ho

AU - Kim, Young Pil

AU - Yoo, Seehwan

AU - Lee, Chi Young

AU - Yoo, Hyuck

PY - 2012/10/1

Y1 - 2012/10/1

N2 - Facing practical limits to increasing processor frequencies, manufacturers have resorted to multi-core designs in their commercial products. In multi-core implementations, cores in a physical package share the last-level caches to improve inter-core communication. To efficiently exploit this facility, operating systems must employ cache-aware schedulers. Unfortunately, virtualization software, which is a foundation technology of cloud computing, is not yet cache-aware or does not fully exploit the locality of the last-level caches. In this paper, we propose a cache-aware virtual machine scheduler for multi-core architectures. The proposed scheduler exploits the locality of the last-level caches to improve the performance of concurrent applications running on virtual machines. For this purpose, we provide a space-partitioning algorithm that migrates and clusters communicating virtual CPUs (VCPUs) in the same cache domain. Second, we provide a time-partitioning algorithm that co-schedules or schedules in sequence clustered VCPUs. Finally, we present a theoretical analysis that proves our scheduling algorithm is more efficient in supporting concurrent applications than the default credit scheduler in Xen. We implemented our virtual machine scheduler in the recent Xen hypervisor with para-virtualized Linux-based operating systems. We show that our approach can improve performance of concurrent virtual machines by up to 19% compared to the credit scheduler.

AB - Facing practical limits to increasing processor frequencies, manufacturers have resorted to multi-core designs in their commercial products. In multi-core implementations, cores in a physical package share the last-level caches to improve inter-core communication. To efficiently exploit this facility, operating systems must employ cache-aware schedulers. Unfortunately, virtualization software, which is a foundation technology of cloud computing, is not yet cache-aware or does not fully exploit the locality of the last-level caches. In this paper, we propose a cache-aware virtual machine scheduler for multi-core architectures. The proposed scheduler exploits the locality of the last-level caches to improve the performance of concurrent applications running on virtual machines. For this purpose, we provide a space-partitioning algorithm that migrates and clusters communicating virtual CPUs (VCPUs) in the same cache domain. Second, we provide a time-partitioning algorithm that co-schedules or schedules in sequence clustered VCPUs. Finally, we present a theoretical analysis that proves our scheduling algorithm is more efficient in supporting concurrent applications than the default credit scheduler in Xen. We implemented our virtual machine scheduler in the recent Xen hypervisor with para-virtualized Linux-based operating systems. We show that our approach can improve performance of concurrent virtual machines by up to 19% compared to the credit scheduler.

KW - Cache-aware scheduling strategy

KW - Multi-core processor

KW - Virtualization

UR - http://www.scopus.com/inward/record.url?scp=84867221418&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84867221418&partnerID=8YFLogxK

U2 - 10.1587/transinf.E95.D.2377

DO - 10.1587/transinf.E95.D.2377

M3 - Article

VL - E95-D

SP - 2377

EP - 2392

JO - IEICE Transactions on Information and Systems

JF - IEICE Transactions on Information and Systems

SN - 0916-8532

IS - 10

ER -