Abstract
The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 μm CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.
| Original language | English |
|---|---|
| Article number | 7744496 |
| Pages (from-to) | 1147-1151 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 64 |
| Issue number | 10 |
| DOIs | |
| Publication status | Published - 2017 Oct 1 |
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Keywords
- Low-dropout (LDO) regulator
- negative capacitance
- power supply rejection (PSR)
ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Capless LDO Regulator Achieving -76 dB PSR and 96.3 fs FOM. / Yun, Seong Jin; Kim, Jeong Seok; Kim, Yong Sin.
In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 64, No. 10, 7744496, 01.10.2017, p. 1147-1151.Research output: Contribution to journal › Article
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TY - JOUR
T1 - Capless LDO Regulator Achieving -76 dB PSR and 96.3 fs FOM
AU - Yun, Seong Jin
AU - Kim, Jeong Seok
AU - Kim, Yong Sin
PY - 2017/10/1
Y1 - 2017/10/1
N2 - The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 μm CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.
AB - The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 μm CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.
KW - Low-dropout (LDO) regulator
KW - negative capacitance
KW - power supply rejection (PSR)
UR - http://www.scopus.com/inward/record.url?scp=85030830391&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85030830391&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2016.2628965
DO - 10.1109/TCSII.2016.2628965
M3 - Article
AN - SCOPUS:85030830391
VL - 64
SP - 1147
EP - 1151
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
SN - 1549-8328
IS - 10
M1 - 7744496
ER -