Abstract
The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 μm CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.
| Original language | English |
|---|---|
| Article number | 7744496 |
| Pages (from-to) | 1147-1151 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 64 |
| Issue number | 10 |
| DOIs | |
| Publication status | Published - 2017 Oct 1 |
Keywords
- Low-dropout (LDO) regulator
- negative capacitance
- power supply rejection (PSR)
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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Yun, S. J., Kim, J. S., & Kim, Y. S. (2017). Capless LDO Regulator Achieving -76 dB PSR and 96.3 fs FOM. IEEE Transactions on Circuits and Systems II: Express Briefs, 64(10), 1147-1151. [7744496]. https://doi.org/10.1109/TCSII.2016.2628965