Characterization and modeling of a new via structure in multilayered printed circuit boards

DaeHan H. Kwon, Jaewon Kim, KiHyuk H. Kim, SeungChul C. Choi, JuHwan H. Lim, Jung ho Park, Lynn Choi, Sung Woo Hwang, Seung Hee Lee

Research output: Contribution to journalArticle

18 Citations (Scopus)

Abstract

We demonstrate that structure engineering of the transmission line near the via can reduce the amount of reflection of the RF signal. We have fabricated two types of vias with different transmission line geometries and have measured the reflection. The measured results show that the shape of the transmission line near the via hole is important in determining the total reflection of the via structure. The amount of reflection obtained from full three-dimensional (3-D) electromagnetic simulations can reproduce the measured results with reasonable accuracy, which suggest that efficient design of the via structure could be possible without resorting to hardware fabrication and characterization.

Original languageEnglish
Pages (from-to)483-489
Number of pages7
JournalIEEE Transactions on Components and Packaging Technologies
Volume26
Issue number2
DOIs
Publication statusPublished - 2003 Jun 1

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Printed circuit boards
Electric lines
Hardware
Fabrication
Geometry

Keywords

  • Electromagnetic simulation
  • PCB
  • RF
  • Via

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Industrial and Manufacturing Engineering
  • Materials Science(all)

Cite this

Characterization and modeling of a new via structure in multilayered printed circuit boards. / Kwon, DaeHan H.; Kim, Jaewon; Kim, KiHyuk H.; Choi, SeungChul C.; Lim, JuHwan H.; Park, Jung ho; Choi, Lynn; Hwang, Sung Woo; Lee, Seung Hee.

In: IEEE Transactions on Components and Packaging Technologies, Vol. 26, No. 2, 01.06.2003, p. 483-489.

Research output: Contribution to journalArticle

Kwon, DaeHan H. ; Kim, Jaewon ; Kim, KiHyuk H. ; Choi, SeungChul C. ; Lim, JuHwan H. ; Park, Jung ho ; Choi, Lynn ; Hwang, Sung Woo ; Lee, Seung Hee. / Characterization and modeling of a new via structure in multilayered printed circuit boards. In: IEEE Transactions on Components and Packaging Technologies. 2003 ; Vol. 26, No. 2. pp. 483-489.
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