While the spin transfer torque magnetic memory (STT-MRAM) suffers from its shortcomings such as high write power, slow write operation and reliability issues, spin orbit torque magnetic random access memory (SOT-MRAM) can offer relatively faster write operation with low power based on giant spin hall effect. Although SOT-MRAM provides low power write operation, to meet the power level of current embedded memories, significant reduction of write power is highly required. In this paper, we present a low power write technique for SOT-MRAM. In order to prevent redundant write operation, read-compare-write operation is adopted. As a result, only the SOT cells having different data are written, and write power is saved in the cells with the same data. For further optimization, bitline switching scheme is used to reduce bitline and source line swing in write operation. The negative bitline scheme is also exploited by re-cycling the charge from read operation to increase write current. Simulation results using 65nm CMOS technology show that up to 40.1 % of write energy can be saved compared to the conventional unnecessary write avoidance approach.