Comparison of Interface State Density Characterization Methods for SiO 2/4H-SiC MOS Diodes

J. R. LaRoche, J. Kim, J. W. Johnson, B. Luo, B. S. Kang, R. Mehandru, Y. Irokawa, S. J. Pearton, G. Chung, F. Ren

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15 Citations (Scopus)

Abstract

Four different methods for calculating interface state density in vertical SiO2/4H-SiC metal-oxide semiconductor (MOS) capacitors were employed on the same samples. The Terman, ac, quasi-static, and Hi-Lo methods were used to extract surface state densities from the SiO2/SiC interface. Surface state densities from 1011 to 1012 cm-2 eV-1 were obtained, depending on the method employed. The Hi-Lo method is particularly susceptible to underestimating the trap density if UV light is not used to empty all the deep-lying traps during measurement.

Original languageEnglish
Pages (from-to)G21-G24
JournalElectrochemical and Solid-State Letters
Volume7
Issue number2
DOIs
Publication statusPublished - 2004

ASJC Scopus subject areas

  • Chemical Engineering(all)
  • Materials Science(all)
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering

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    LaRoche, J. R., Kim, J., Johnson, J. W., Luo, B., Kang, B. S., Mehandru, R., Irokawa, Y., Pearton, S. J., Chung, G., & Ren, F. (2004). Comparison of Interface State Density Characterization Methods for SiO 2/4H-SiC MOS Diodes. Electrochemical and Solid-State Letters, 7(2), G21-G24. https://doi.org/10.1149/1.1632872