Compiler-directed cache coherence scheme with improved intertask locality

Lynn Choi, Pen Chung Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

In this paper, we introduce a compiler-directed coherence scheme which can exploit most of the temporal and spatial locality across task boundaries. It requires only an extended tag field per cache word, one modified memory access instruction, and a counter called the epoch counter in each processor. By using the epoch counter as a system-wide version number, the scheme simplifies the cache hardware of previous version control [5] or timestamp-based schemes [12], but still exploits most of the temporal and spatial locality across task boundaries. We present a compiler algorithm to generate the appropriate memory access instructions for the proposed scheme. The algorithm is based on a data flow analysis technique. It identifies potential stale references by examining memory reference patterns in a source program.

Original languageEnglish
Title of host publicationProceedings of the ACM/IEEE Supercomputing Conference
Editors Anon
PublisherIEEE
Pages773-782
Number of pages10
Publication statusPublished - 1994
Externally publishedYes
EventProceedings of the 1994 Supercomputing Conference - Washington, DC, USA
Duration: 1994 Nov 141994 Nov 18

Other

OtherProceedings of the 1994 Supercomputing Conference
CityWashington, DC, USA
Period94/11/1494/11/18

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Choi, L., & Yew, P. C. (1994). Compiler-directed cache coherence scheme with improved intertask locality. In Anon (Ed.), Proceedings of the ACM/IEEE Supercomputing Conference (pp. 773-782). IEEE.