Consideration of Discrete Interface Traps in InGaAs/GaAs Heterojunctions

Jichai Jeong, Tuviah Chlesinger, Arthur G. Milnes

Research output: Contribution to journalArticle

16 Citations (Scopus)

Abstract

Poisson's equation has been applied to model the capacitance-voltage (C-V) profile of a Schottky-barrier n-N heterojunction of Au/nln0.1;Ga0.9As/NGaAs. Interface traps, represented either as a box or sheet of charge, have been included in the calculation. Two electron accumulation peaks are observed. One, next to the region depleted of electrons, is related to the interface trap occupancy, and the other is related to the two-dimensional electron gas at the heterojunction. Qualitative agreement is obtained between the calculated and experimentally determined C-V electron profile (300 to 77 K) if a trap Ec - 0.13 eV at a concentration -8 × 1010 cm -2 in a 300-Å box-like distribution is included in the calculation. For MBE grown nln0.1;Ga0.9;As/NGaAs deep-level transient spectroscopy suggests that the interface traps are at Ec - 0.13 and 0.17 eV with capture cross sections of about 2 × 10-14 and 1 × 10 -15 cm2.

Original languageEnglish
Pages (from-to)1911-1918
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume34
Issue number9
DOIs
Publication statusPublished - 1987 Sep

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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