TY - GEN
T1 - Customized SRAM design for low power video code applications
AU - Lee, Sangkyu
AU - Tang, Hoyoung
AU - Choi, Kyungrak
AU - Park, Jongsun
N1 - Funding Information:
This work was supported by the National Research Foundation of Korea (2011-0020128 and 2016R1A2B4015329). This work was also supported by information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology (KEIT) [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC].
Publisher Copyright:
© 2016 IEEE.
Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2016/12/27
Y1 - 2016/12/27
N2 - In this paper, an embedded SRAM architecture of Video application is proposed to reduce the power consumption. By analyzing the general read and write access patterns, the embedded memory is customized to reduce power consumption while achieving general FIFO operations. Some of the signal activations and the Pseudo-read operations are removed in FIFO. According to the simulation results with 65nm CMOS process, the proposed embedded memory for line buffer achieves 17.62% power savings with 3.72% overhead compared to the conventional embedded SRAM approaches.
AB - In this paper, an embedded SRAM architecture of Video application is proposed to reduce the power consumption. By analyzing the general read and write access patterns, the embedded memory is customized to reduce power consumption while achieving general FIFO operations. Some of the signal activations and the Pseudo-read operations are removed in FIFO. According to the simulation results with 65nm CMOS process, the proposed embedded memory for line buffer achieves 17.62% power savings with 3.72% overhead compared to the conventional embedded SRAM approaches.
KW - Embedded memory
KW - Line buffer
KW - Low power operation
KW - Multimedia
KW - SRAM
UR - http://www.scopus.com/inward/record.url?scp=85010423734&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85010423734&partnerID=8YFLogxK
U2 - 10.1109/ISOCC.2016.7799742
DO - 10.1109/ISOCC.2016.7799742
M3 - Conference contribution
AN - SCOPUS:85010423734
T3 - ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things
SP - 79
EP - 80
BT - ISOCC 2016 - International SoC Design Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th International SoC Design Conference, ISOCC 2016
Y2 - 23 October 2016 through 26 October 2016
ER -