D-band heterodyne integrated imager in a 65-nm CMOS technology

Daekeun Yoon, Namhyung Kim, Kiryong Song, Jungsoo Kim, Seung Jae Oh, Jae-Sung Rieh

Research output: Contribution to journalArticlepeer-review

9 Citations (Scopus)

Abstract

A D-band heterodyne integrated imager, consisting of a mixer, an oscillator, an IF amplifier, and an IF detector, has been developed in a 65-nm CMOS technology. A measured responsivity of 720 kV/W and noise equivalent power (NEP) of 0.9 pW/Hz1/2 were obtained at 125 GHz. A total dc power of 74 mW was dissipated. The chip size is 1200 × 800 μ2 including contact pads and an input balun. A D-band image was acquired with the imager serving as a detector. A significant resolution enhancement was demonstrated with a near-field imaging achieved by a metal plate with a pinhole in the imaging setup.

Original languageEnglish
Article number7017460
Pages (from-to)196-198
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume25
Issue number3
DOIs
Publication statusPublished - 2015 Mar 1

Keywords

  • CMOS
  • CMOS integrated circuit
  • imaging
  • receivers

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'D-band heterodyne integrated imager in a 65-nm CMOS technology'. Together they form a unique fingerprint.

Cite this