We have developed front-end electronics and data acquisition unit for a silicon drift diode (SDD) based prototype detector. The prototype detector consists of an array of 67 SDDs. The array is bump-bonded on a mother board which is cooled by Peltier-water based cooling system. In this study, we describe the function of front-end electronics (including preamplifier, shaper and peak stretcher units) and a data acquisition (DAQ) unit. The hardware consists of three major blocks: 1) a preamplifier board that amplifies the SDD signal, 2) a shaping and stretcher board that shapes event signal and stretches it, and 3) DAQ board that converts analog signal to digital and acquires digitized data. The preamp board amplifies 67 channel SDD signals with OP-amps and controls the jFET of each SDD to optimize reset interval and gain. The shaping board consists of 5 sub-blocks that are shaper, peak stretcher, MUX, discriminator and SHP-ctrl. It shapes the preamplifier signal and generates event signals. The DAQ consists of an array of AID converters and FPGAs. In our FPGA simulation, the system uses 62% of memory, 21% of LOGIC slice. We evaluated and verified 3 boards with including FPGA program. In the result we found and settled some problems which cross talk and noise. However, we meet two problems that are SDD sensor board and synchronous reset circuit. We will fix some problems and evaluate the detector performance such as spatial resolution and energy spectrum, etc. We will also include the results of phantom study later.