TY - JOUR
T1 - Defect analysis of a MELO-Si over SiO2 strips of different widths and spacings
AU - Pak, Jungho James
AU - Kim, Bong Soo
AU - Neudeck, Gerold W.
PY - 2000/12
Y1 - 2000/12
N2 - A merged epitaxial lateral overgrowth of silicon (MELO-Si) is an extension of selective epitaxial growth of silicon (SEG-Si), and it can be used to produce a localized silicon-on-insulator (SOI) structure. The localized SOI structure can be realized by selectively growing silicon crystals from adjacent seed holes, which are separated by a strip of SiO2, until they merge on the SiU2 strip between seed holes. This MELO-Si layer can be utilized for fabricating SOI devices if the material quality is proven to be good enough. In this paper, a defect analysis of a MELO-Si film on SiU2 is presented. A cross-section SEM photograph of the fabricated MELO-Si showed no visible physical defects or voids. On the other hand, Secco etch revealed defects near the merging plane; hence, this merging plane can generate bad effects for SOI device application. However, a careful MELO process combined with an extra annealing step may anneal the defects near the merging seams and, hence, improve device characteristics. Almost identical diode ideality factors and leakage characteristics were obtained from the silicon substrate, the SEG-Si, and the MELO-Si film.
AB - A merged epitaxial lateral overgrowth of silicon (MELO-Si) is an extension of selective epitaxial growth of silicon (SEG-Si), and it can be used to produce a localized silicon-on-insulator (SOI) structure. The localized SOI structure can be realized by selectively growing silicon crystals from adjacent seed holes, which are separated by a strip of SiO2, until they merge on the SiU2 strip between seed holes. This MELO-Si layer can be utilized for fabricating SOI devices if the material quality is proven to be good enough. In this paper, a defect analysis of a MELO-Si film on SiU2 is presented. A cross-section SEM photograph of the fabricated MELO-Si showed no visible physical defects or voids. On the other hand, Secco etch revealed defects near the merging plane; hence, this merging plane can generate bad effects for SOI device application. However, a careful MELO process combined with an extra annealing step may anneal the defects near the merging seams and, hence, improve device characteristics. Almost identical diode ideality factors and leakage characteristics were obtained from the silicon substrate, the SEG-Si, and the MELO-Si film.
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U2 - 10.3938/jkps.37.980
DO - 10.3938/jkps.37.980
M3 - Article
AN - SCOPUS:0034347689
SN - 0374-4884
VL - 37
SP - 980
EP - 983
JO - Journal of the Korean Physical Society
JF - Journal of the Korean Physical Society
IS - 6
ER -