Abstract
It is a challenging task in a network-on-chip to design an on-chip switch/router to dynamically support (hard) guaranteed throughput under very tight on-chip constraints of power, timing, area, and time-to-market. This paper presents the design and implementation of a novel pipeline circuit-switched switch to support guaranteed throughput. The proposed circuit-switched switch, based on a backtracking probing path setup, operates with a source-synchronous wave-pipeline approach. The switch can support a dead-and live-lock free dynamic path-setup scheme and can achieve high bandwidth and high area and energy efficiency. A silicon-proven prototype of a 16-bit-data 5-bidirectional-port switch in a four-metal-layer 0.18-μ m CMOS standard-cell technology can yield an aggregate data bandwidth of up to 73.84 Gb/s, while occupying only a modest area of 0.0315 mm 2. The synthesizable implementation of the proposed switch also results in a cost-effective design, fast development time, and portability.
Original language | English |
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Article number | 5678607 |
Pages (from-to) | 270-283 |
Number of pages | 14 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 20 |
Issue number | 2 |
DOIs | |
Publication status | Published - 2012 Feb |
Keywords
- Backtracking
- circuit-switched
- dynamic path-setup
- guaranteed throughput
- network-on-chip (NoC)
- on-chip switch
- source synchronous
- wave-pipeline
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering