Abstract
A wide locking-range frequency divider with programmable input sensitivity is presented in this paper. The frequency divider consists of two D flip-flop-based current mode logic latches and a current control circuit. The current control circuit adjusts the current ratio of the sampling pair and the latching pair, while the total current is maintained as a constant. The current control circuit enables the self-oscillation frequency to be adapted to the input frequency. As a result, the divider has wide locking range below -10 dBm input level. The proposed frequency divider is implemented in 0.18 um standard CMOS technology, and the measurement results show a 169% frequency locking range of between 0.5 and 6 GHz at an input power of - 10 dBm while consuming 7.2 mW from a 1.8 V supply voltage.
| Original language | English |
|---|---|
| Title of host publication | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 222-223 |
| Number of pages | 2 |
| ISBN (Print) | 9781479975426 |
| DOIs | |
| Publication status | Published - 2015 Mar 23 |
| Event | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 - Las Vegas, United States Duration: 2015 Jan 9 → 2015 Jan 12 |
Other
| Other | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 |
|---|---|
| Country | United States |
| City | Las Vegas |
| Period | 15/1/9 → 15/1/12 |
Keywords
- current mode logic latch
- divide-by-2
- frequency divider
- wide locking range
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering
- Industrial and Manufacturing Engineering