Design of the voltage clamp delay cell VCO using quadrature phase for low phase noise and high speed operation

I. W. Seo, W. B. Choi, S. M. Jung, M. Y. Sung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We have designed a new current-mode low-voltage, low-power supply, high-frequency CMOS VCO (Voltage Controlled Oscillator) circuit. The main purpose of this new circuit is to obtain low phase noise with more than 1 GHz oscillation frequency from one battery cell. The fully differential-type voltage clamp delay cell VCO enables extremely low supply voltage operation due to wide tuning range and superior linearity between the oscillator frequency and control voltage of a ring oscillator because of low phase noise. A design which combines the transitions of each delay cell output enables the VCO's high frequency operation. The characteristics of the designed VCO were examined by the HSPICE and SABER circuit simulation. Operation with a 3.3 power supply and 3.6 GHz oscillation frequency was verified.

Original languageEnglish
Title of host publicationICVC 1999 - 6th International Conference on VLSI and CAD
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages570-573
Number of pages4
ISBN (Print)0780357272, 9780780357273
DOIs
Publication statusPublished - 1999
Event6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of
Duration: 1999 Oct 261999 Oct 27

Publication series

NameICVC 1999 - 6th International Conference on VLSI and CAD

Other

Other6th International Conference on VLSI and CAD, ICVC 1999
CountryKorea, Republic of
CitySeoul
Period99/10/2699/10/27

ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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    Seo, I. W., Choi, W. B., Jung, S. M., & Sung, M. Y. (1999). Design of the voltage clamp delay cell VCO using quadrature phase for low phase noise and high speed operation. In ICVC 1999 - 6th International Conference on VLSI and CAD (pp. 570-573). [821003] (ICVC 1999 - 6th International Conference on VLSI and CAD). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICVC.1999.821003